STEbus Z180 slave board (IPI)

A 64180 or Z180 communicates with the STEbus through a one-byte port.

Similar projects worth following
Created by British Telecom as part of their Martello series. It was named the IPI (Intelligent Peripheral Interface) with no specific job. It was a slave CPU board, much like the BBC Micro second processors.

I have one of these boards, but no circuit diagram or hardware manual.

The PAL chips have been read to JEDEC files, and disassembled to equations, but the pin names are things like i2, i3, o1, o6. I have buzzed some connections to establish useful names, and plan to do more as time allows.

PL3 and 4 pinouts allow ribbon cable connection to cable-mounted DE9 connectors that are pinout compatible with PC serial ports.

PL5 carries both serial channels on an Arcom-standard header.

The CPU is a HD64B180ROP (B rating is 6 MHz). The CPU oscillator is 13 MHz, the serial port oscillator is 12.288 MHz. Thus the CPU clock is 6.5 MHz, about 63% faster than a standard Z80. Memory cycles are all 3 clock cycles long.

IPI-U05 (edited).EQN.txt

Application connector address decoder

plain - 2.33 kB - 02/12/2023 at 01:52


plain - 766.00 bytes - 02/12/2023 at 01:52


IPI-U01 (edited).EQN.txt

Z180 glue logic

plain - 2.53 kB - 02/12/2023 at 01:52


IPI-U04 (edited).EQN.txt

Seems to be the STEbus address decoder

plain - 3.06 kB - 02/12/2023 at 01:52


IPIMON-v1-6_4732-00-asm2 (8).txt

IPI Monitor ROM source code partly reverse engineered.

plain - 84.22 kB - 02/05/2023 at 14:32


View all 11 files

  • 2 × 74LS541N Logic ICs / Buffers, Drivers, Transceivers
  • 2 × 74LS245N Logic ICs / Receivers, Transceivers
  • 1 × SN74LS688N Logic ICs / Comparators
  • 1 × 74ALS1035N
  • 1 × Z8038APS FIFO, 128 byte

View all 12 components

  • Project journal

    Keith02/05/2023 at 16:29 0 comments


    Populated with PAL chips. Both memory chips have A0 to 13, enough for 16K devices. Address, Data, /CE, /RD and /WR pins are toggling.

    No sign-on message. :-(

    Serial data from terminal appears at the CPU pin RXA0, and CTS0 toggles as driven by RTS, but no activity on TXD0.

    There is a good chance that this was a non-working board used for exhibition display purposes.

    This will take a bit of work to diagnose. I'll need to analyse the firmware. I started disassembling it. I need to write some self-diagnostic code.

  • IPI Monitor software

    Keith02/01/2023 at 12:36 0 comments

    The 32K EPROM has a monitor in the first 1400h bytes, and the rest is just blank (FFh).

    The software comes in three versions, communicating through a Z80 FIFO, single-byte latch, or serial port. Monitor versions are available for different default console devices.

    4732-00 uses Serial Channel 0
    4732-01 uses Serial Channel 1
    4732-02 uses STEbus FIFO Mailbox

    I have only the -00 version.

    The manual includes source code for the initial entry points.

    I've not disassembled the rest of the code yet.

  • BT Engineering magazine article: All-CMOS High-Temperature STEbus

    Keith01/04/2022 at 16:54 0 comments

    British Telecommunications Engineering Volume 7 page 77

    All-CMOS High-Temperature STEbus

    The first all-CMOS processor board for the STEbus has been announced by British Telecom Microprocessor Systems. Based on Intel’s 8031 CPU with CMOS memory and input/output (I/O), the minimal power consumption and inherent noise immunity of the board makes it ideally suited to the implementation of computer systems for battery- powered or harsh-environment applications.

    The board, designated the 4040-00 , accepts up to 32K ROM and 32K RAM, and offers 24 lines of digital I/O, two 16 bit counter-timers, two external interrupts, a battery-backed real-time clock with watch-dog timer, and power-fail circuitry. I/O facilities are brought out on a ribbon-cable connector conforming to the STE industry-standard ‘signal-conditioning bus’ scheme, which allows connection to a wide variety of real-world off-the-shelf interfaces.

    The 4040-00 operates over -40 to +85°C, working from a single 5 V supply and consuming just 40 mA. Combined with CMOS technology’s excellent noise immunity, the board is an ideal basis for the design of computer system applications such as remote data loggers, factory-floor data collection terminals or portable test instrumentation. Remote applications are supported by BT’s STEbus modem for connection to the public-switched telephone network.

  • BT Engineering magazine article: First STEbus Modem

    Keith01/04/2022 at 16:51 0 comments

    British Telecommunications Engineering Volume 6 Part 4 page 285

    First STEbus Modem

    British Telecom Microprocessor Systems has launched the first STEbus-compatible modem which provides systems designers with an easy means of building remote STEbus control and instrumentation systems capable of communications over the public switched telephone network. The modem operates to V.21 or V.23 standards and has built-in intelligence to allow control by a high-level Hayes-like command protocol.

    The modem, designated 4300 , comes on a single-Eurocard form-factor, integrated with a BT603A line connector inside a small shielded enclosure to conform to BABT requirements. LED indicators and a loudspeaker for line monitoring are also included in the package.

    In addition to the standard V.21 /23 communication capability (300/300 or 1200/75 baud transmit/receive data rates respectively), the 4300 can switch under software command to a 75/1200 baud configuration for high-speed bidirectional data transmission. A further software-selectable option provides a back channel of 150 baud for use on leased telephone lines.

    The high-level command set includes control over a wide range of modem functions including dialling, answering, operating mode, line monitoring transmit carrier, console echo, loopback, reset, identification request, and status codes.

  • BT Engineering magazine article: 68000 board

    Keith01/04/2022 at 16:50 0 comments

    British Telecommunications Engineering Volume 6 Part 4 page 284

    68000 STEbus Processor

    A new high-performance CPU card from British Telecom Microprocessor Systems offers designers exceptional processing power on an extremely cost-effective bus — STE. Prior to this introduction, users would almost certainly have had to purchase such a CPU implemented on an expensive high-performance bus like VME.

    The board, designated the 4020 , is based around a full 16 bit 68000 running at 8 MHz without wait states. To maximise this device’s computational power, 16 bit implementation is preserved right across the card. The fact that STEbus offers only an 8 bit data path has minimal impact on overall system throughput, because the module has enough memory to allow the CPU to operate locally in most applications.

    Up to half a megabyte of RAM, or ROM, or a mix of memory types, can be fitted on board. Moreover, the PWB is designed to accommodate future device technology: its three pairs of JEDEC 32-pin byte-wide memory sites are fully word and byte addressable, which allows a potential 6 Mbyte of memory to be fitted (when the devices are available). A software-controlled memory overlay facility is also provided: once the system boot-up sequence has been completed, the ROM can be switched out of the memory map in favour of RAM, in order to suit differing operating system requirements.

    The board is designed for systems requiring extensive processing power, and incorporates arbitration circuitry that allows it to operate in multiprocessor STEbus environments. A software locking feature gives designers the freedom to retain sole use of the bus during time-critical data transfer operations. However, the 4020 will also operate as the sole CPU in an STEbus system. The board also includes logic for handling all of STEbus’ attention request lines and the transfer error signal, plus system clock and counter-timer facilities.

    During system development, an on-card RS232 port can be used as a terminal driver, and a basic start-up monitor is included in ROM. In the target system, this port can be redeployed as a simple serial I/O channel: it is brought to the front edge of the card on a 10-way shrouded header, and when connected via ribbon cable to a 9-pin male ‘D’ type connector, provides compatibility with the serial port on an IBM AT.

    The 4020 card, which forms part of BT’s Martello range of STEbus systems and peripherals, sets a new standard in STE price and performance. Designed for use with any modern multi-tasking operating system — including OS/9 and Tripos — the card brings the computational power of true 16 bit processing to STE systems. A flexible approach to memory expansion, coupled with the inherent cost advantages of the STE standard, means that high-performance future-proof systems can now be cost-effectively realised.

  • BT Engineering magazine article: Intelligent Serial Interface

    Keith01/04/2022 at 16:46 0 comments

    British Telecommunications Engineering 

    Volume 6 Part 4 page 284

    Intelligent Serial Input/Output Module for STEbus

    An intelligent serial input/output (I/O) card — the first for the STEbus — is now available from British Telecom Microprocessor Systems. Offering four fully-buffered serial channels, the 4500 features an on-board processor which minimises bus I/O by processing data locally, freeing up the STEbus and optimising system bandwidth. High-performance arithmetic and real-time clock functions can be included on-card, and provide significant enhancement capabilities for STEbus systems.

    The provision of local intelligence by an on-board Z80A CPU provides systems designers with the means to process serial data prior to accessing the system’s internal STEbus. Such a distributed processing scheme relieves the STEbus master CPU from significant processing overheads, so that overall system performance and bus bandwidth are optimised. For example, incoming data from up to four sensors can be concentrated and analysed before transmitting a status report to the master; or outgoing data could be sent to a number of seperate VDUs and printers with data protocol conversion being handled locally.

    All four I/O channels are driven by two Zilog Z8531 SCCs, and offer flexible asynchronous RS232 communications facilities. This capability is backed by an extensive 48K RAM buffer. Each channel is brought to the front edge of the card on a 10-way shrouded header; when connected via ribbon cable to a 9-pin male D-type connector, this offers compatibility with the serial port of an IBM AT or compatible computer.

    The 4500 also offers powerful enhancement features for any STEbus system. A socket for AMD’s Am9511A arithmetic processor allows the board to handle complex fixed- or floating-point mathematical operations, including full trigonometric functions. This chip is designed specifically for 8 bit I/O systems, but employs internal 16/32 bit architecture for maximum precision, to allow the computational capability of an STEbus system to be extended in a cost-effective manner. Another socket for a real-time clock extends the applications potential of the 4500 to timing/dating communications, and/or implementing programmable-alarm/stopwatch facilities. This facility is battery-backed for up to 10 years.

    Forming part of BT’s Martello range of STEbus systems building blocks, the 4500 comes with a monitor in ROM, and epitomises the thought behind this series of systems products: by distributing intelligence throughout the STEbus and relieving the master CPU of many tasks, true parallel processing can now be achieved, so that technically-efficient solutions can be realised in the minimum of time.

    4500 intelligent serial I/O card for STEbus

View all 6 project logs

Enjoy this project?



Similar Projects

Does this project spark your interest?

Become a member to follow this project and never miss any updates