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Soldering Problems

A project log for Cell Phone 4G LTE Repeater / Booster / Femtocell

An outside pole mounted aerial picks up 4G signals which are then filtered, amplified and re-transmitted through a second inside aerial.

TegwynTwmffat 09/19/2017 at 11:526 Comments

After several weeks of trying to solder the RF amplifier chips I eventually concluded that the techniques that I was using to accurately position the chips was not up to scratch. I tried microscopes, magnifying glasses, magnifed eyeglasses that you jam into your eye socket - all to no avail.


Using the square drawn on the silkscreen was hopeless as the board manufacturer could, or would, not print the silkscreen accurately and this route proved to be a dead end.


I did elongate the PCB pads slightly so that they were visible, but the pads on the chips themselves are not visible at all so there was no possibility of lining them up at all - another dead end.


After a while, just by chance, I was able to get the two chips, the LNA and VGA working together by connecting up different boards and when they worked, they worked really well. This was nice as it effectively ruled out any incompatibility issues. Unfortunately, the laws of probability did not allow me to get the two chips working on the same board ..... Not yet anyway.


So, I needed a fool proof way of aligning the chips and eventually came up with the idea of using some top layer pads as markers instead of being used for electrical connections. In the diagram below there are four tiny red squares, one of which has a blue arrow pointing towards it. These pads are placed exactly corner to corner with the main chip so that the chip can be nudged into position by focusing a microscope on each corner at a time. This should enable positioning to about 0.05 mm which is absolutely fine for chips with a 0.5 mm pitch. Now just need to get another batch of PCBs made :(


It's worth noting that trying to use a microscope to look at all the corners of the chip at the same time will inevitably be inaccurate due to the marker squares being partially obscured by the chip, particularly severe if the chip is quite tall.


The first diagram below shows the chip in place, as a solid white square:

Discussions

Pero wrote 09/19/2017 at 21:44 point

How do you solder? I use hot air gun when reworking QFNs and it usually goes without problems - surface tension does it's magic. If there are side contacts too, I use a lot of flux paste and solder blob on a sharp tip solder iron. So far, didn't have any unsolvable problems...

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TegwynTwmffat wrote 09/20/2017 at 08:37 point

I'm using reflow oven and hot air for reworking. Surface tension does not seem to be working properly. There's a large heat sink pad that must be soldered with vias as shown in diagram. I guess this is messing up surface tension effect?

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K.C. Lee wrote 09/19/2017 at 12:56 point

Might want to fix the tracks to lower left corner.  That breakout is still in the soldermask opening and the surface tension can pull the chip alignment slightly off.  i.e. off centered, wide track.

Have you try hotair reflow?   https://hackaday.io/project/6929-smt-assembly-on-the-cheap  Chips can self align due to surface tension.  That's why I warn about how the tracks should be done.

That one is 0.5mm pitch and I have used 0.4mm or finer pitch parts without much problems?  Solder paste would make life easier, but I am too cheap.  :P

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TegwynTwmffat wrote 09/19/2017 at 13:25 point

thanks for the positive comments K.C. I'll definitely fix that track.i did not notice any self alignment or self misalignment with these chips probably because they have massive heat sink pads which suck in lots of solder.i had 2/3 success rate on the last run and managed to fix the third chip alignment with hot air. There is hope!

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K.C. Lee wrote 09/19/2017 at 13:33 point

You can use very small via size so that the surface tension prevent the solder from being sucked into the vias.  

Looking at the ratnet, it would seem that there are lots of ground pins, so you could connect each of them to the pad and use their outside connection for sinking heat.  This allows you to move the heatsink vias to outside the package.

www.ti.com/lit/an/sloa122/sloa122.pdf

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TegwynTwmffat wrote 09/20/2017 at 09:35 point

thanks kc that's very useful. It seems that my vias are too big and the stencil needs to break up the solder into smaller rectangles rather than one big blob.

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