Watching https://player.vimeo.com/video/450406346 , at about 32:00 I realise that AVX512 implements ROP3 ! Had I had this opcode back in 1999 I would have save SO MUCH DEVELOPMENT TIME !

And I see that my best computer, a i7 10750H, does only support AVX2.

Worse : AVX512 is disabled on the 12th gen processors ! So either I'll have to get a 11th gen CPU, or wait until Intel gets its **** together.

SIGH

It's disabled ... did you find out why? Process problems?
Edit: I've found this:
https://www.tomshardware.com/news/intel-nukes-alder-lake-avx-512-now-fuses-it-off-in-silicon
https://www.realmicentral.com/2021/08/18/amd-zen4-will-support-avx512/

@Thomas  anyway I'm too broke to consider buying a brand new flagship-class computer for now...

Buying the latest hardware for hobby purposes requires deep pockets. If the "ROI" is of a "non-material" kind having fun with slightly (or really) outdated stuff is just as good (and as the Finnish saying goes: reikä se on rumallakin!)

@Thomas  now you owe me Finnish lessons.

Anyway that project will wait a bit. I have bigger whales to hunt, #PEAC Pisano with End-Around Carry algorithm  is going full steam ahead.

But seriously, ROP3 should be a standard opcode for any serious processor architecture :-/

Finnish lessons another day.

In chapter 2.4 you wrote "Les mesures effectuées au MIT en janvier 2000 montrent que les PC de bureau de dernière génération sont presque aussi rapides qu'un bloc CAM8 (8 cartes à 25MHz). Les tout derniers microprocesseurs généralistes permettent de rivaliser avec des ASIC créés il y a plusieurs années. En terme de génération équivalente, si l'on considère la règle de Moore, l'optimisation poussée du code a permis probablement de gagner trois ou quatre années par rapport à un code non optimisé. Le code est 4 fois plus rapide que le plus rapide des codes testés, ce qui permet d'affirmer que l'effort a permis de gagner 3 ans. Ce gain permet d'utiliser une machine plus vieille à vitesse égale (donc moins chère) ou bien de gagner 3 ans sur la machine la plus récente. Cet aspect d'économie est valable si le code original était "bâclé", mais reste dans le cadre de la démonstration du fait qu'un codage consciencieux n'est pas une perte de temps à longue échéance."

I wanted to add something smart but it turned out that in chapter 2.5 you already did that. Chapeau.

@Thomas To be fair, I spent more time overall than normal on this thesis. I played with the algorithms and prepared all the elements for maybe 2 years, before the masters year, which turned into two, for the bit-parallel version described. Thus it is quite thorough.

But what smart thing did you want to add ? :-D

That's a great resource, especially from the "inside the design-process" perspective.

https://hothardware.com/news/amd-financial-analyst-day-2022-consumer-coverage

hmmm'OK.

trying to run these type  simulations has always been a pain for me maybe you could run my space plane fuselage and see what it does when I post it in a iges file soon on my entry

The FHP3 model is not the most efficient "in practice" for your kind of design.

It's working up to Mach 0.3, maybe 0.4, at low Reynolds. Think : model RC planes...

Furthermore, FHP3 is 2D only :-/

I've seen that desktop 2D simulations (using Navier Stockes and others) have progressed a lot recently, I don't know for 3D.

However FHP3 has value in educational and gaming applications :-) It can usually run interactively with very rich interactions.