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Assembly in VHDL works

A project log for YGREC8

A byte-wide stripped-down version of the YGREC16 architecture

yann-guidon-ygdesYann Guidon / YGDES 01/01/2019 at 16:040 Comments

The latest archive upload shows the new assembler, which just passed all the self-tests. The few corner cases gave some difficulties but they were solved.

Part of the self-test includes throwing "stuff" at the assembler and disassemble it, to see if the parser chokes on anything. Of course this is not perfect but most cases of user abuse are covered.

The other part scans the WHOLE INSTRUCTION SPACE. The instruction is disassembled, reassembled an re-disassembled to check discrepancies. This is where the ambiguities become obvious.

All these test ensure that no "blind spot" or undefined behaviour exists, not just in the assembler and disassembler, but also in the ISA itself.

Overall, VHDL is perfectly capable of assembling and disassembling instructions with only the basic feature set. It's not the easiest language but the Ada legacy helps a lot ! Thanks to GHDL there is no need of an external software module and this package ygrec8_asm adds a  lot of convenience in the simulator, emulator and debugger !

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