20MAR18:

Original publish date on hackaday.io. At this point, the Artix-7 has been removed from the schematic, and the iCE40 has been added. Complete connection details on the iCE40 need to be added. Some component selection is still necessary (notably, what type of external memory to use on the FPGA). Additionally, the programming interface still needs design and validation.

The fRISCy schematic is approximately 70% complete, and PCB layout is approximately 40% complete. Design documentation needs to be generated as well, including:

• Updated system block diagram
• Clock and Reset block diagram
• Power distribution tree

Upon completion of the schematic, the following files will be generated:

• PDF of schematic
• BOM
• Component operating temperature range report

Upon completion of the PCB layout, the following files will be generated:

• Fabrication files:
  • Gerbers
  • Drill
  • Pick/place