(This post refers to git commit 3af0b916d7481305979181e1c307ef40e1b46f19.)Finally! Here's the important part: all of the hardware model for the Teensy. Well, most of it. There's something I haven't put in quite yet that I'll get to in the next log. :)This...
If you are interested in flipflops, building CPU's might also be of interest to you.... I started a new project, a 4 bit TTL ALU with only 7 TTL IC's. It fits on a 1 x 1 inch PCB.....And the next project is a TTL CPU on one square inch...
Lattice has provided ready-made software processor named Mico8 (8bit CPU) and Mico32 (32bit CPU). This time I quickly checked its developing flow on my board. The Lattice's tutorial, which can be available by googling "Mico8 tutorial" is enough to see...
Garrett Scott I'm Garrett Scott, technical marketing engineer at Microchip Technolog, specifically in the 8-bit divisionYann Guidon / YGDES technical marketing engineer : is that technical, marketing, or engineering ?....Kevin @Yann Guidon / YGDES They...
As one of the modules of my "TTL" CPU caled SPAM-1 I’ve been wiing up the UM245R serial to parallel UART from Future Tech Devices Inc FTDI. See datasheet :https://www.ftdichip.com/Support/Documents/DataSheets/Modules/DS_UM245R.pdf I’m using it...
All instructions are 16-bit wide (1 word), with optional extension of 16 more bits for immediate value needed for some of these instructions. Bit patterns for the instruction types: bits in instruction word: FEDC BA98 7654 3210 [extension]...
Today I will be adding 4 project logs, 3 of which are a bit overdue.For the first, sometime back in June of last year, I began to look into the simple ISA implementation used to interface the Cirrus Logic CL-GD5429 SVGA chip to the 68332. My intention...
We were last seen with the OPC-3 - a one-page computer with 16 bit data, 16 bit addresses, and 16 valid opcodes, as a hastily-inflated version of OPC-1, our CPU for CPLD. It felt good to have 16 bit words - lots of room in the instructions, and fitting...
The Changes to the Instruction set: The MC14500 is primarily a 1-bit ICU. and thus, its not generally meant to do arithmetic (though it can through manual bit manipulation, it's not very fast.) Just as the UE14500 Project, our CPU will add...
I had to undo the last change to the ALU, because it broke things.The ALU, and also the right-shifting mechanism, need to work on full 18-bit words with the sign bit in bit 17, to accommodate a one-bit overflow of intermediate results during multiplication....
I'm sure anyone familiar with Arduino must be skeptical.16 bit, 44 kHz streaming, not just 1 input or output for monophonic playing, but many simultaneous streams between dozens of virtual objects, with I2S digital audio streaming to an external ADC/DAC/Codec...
When I was coming up with new Register Transfer Scheme, and in general while rethinking the design approach for this CPU, I realised that the explicit state machine will be the way to go. At the time I thought it would consist of quite a few of...
Before I began the layout of the DDL4-CPU, I came up with an initial Instruction Set Architecture (ISA) for the design. It went through several revisions as I was designing the boards and refined the components. Here at the last minute as I am...