I'm going to create a stand-alone PSoC project to use the PSoC to read SD cards. I'm going to start with the hardware defines for this project (which should leave the Z80 hardware pins unmolested) and just not download code. For the software piece, I...
Today, i rewrite a code of ambient light of arduino module applied FastLED library carefully. Why? there are 3 important thing, 1) the legacy code of adalight is based on SPI that is used by a RF module too. I think move pin in code of adalight from...
See Update BelowContext being more that of the puzzle of cases not one case "to rule them all," but I digress. The past week I've been going through a few catalogs to find an enclosure for D-DAQ's mainboard. Previously, the PCB's form factor was based...
You might remember my musings with the XOR gate with interlocked NPN transistors discussed at Bipolar XOR gate with only 2 transistors But thinking about how XOR is done with pass transistors in CMOS and the structure often creates a MUX, I wondered...
Note: this log is obsoleted by BitsliceAfter the last log Adder with Falstad, I also converted the ROP2 bitslice to the interactive simulator : There is still the challenge to disable the output of the CLA so it can be combined by ORs with the rest...
One last thing that was still missing was the symbol table. Apparently the output of the softmax layer maps directly to the symbol table, and since this output is 128 in length, I was searching for a table of this same length.The prime suspect was of...
In this post I want to share how I selected a suitable topology for the resistor network that will be the core of the programmable decade resistor. Although I did some online “research”, the following criteria determined my choices: Switch...
My friend Dylan Brophy inspired me to investigate the ability to output the cyrillic text using different output devices, supported by Terminal-BASIC. 1. Using symbols others then capital latin in identifiers not possible and unnecessary. 2. USART output....
SATA StatusAfter weeks of painful debugging. I have been able to read and write to the hard drive!I ran into an issue though... the speed at which I can communicate with my FPGA to/from my computer maxes out at about 16MBs and the hard drive reads/writes...
Stephen : Alright, let's get rolling. A BIG hello to @Parker for joining us today Parker : Howdy everyone Stephen : @Parker, why don't you kick this off by giving us an introduction of who you are, what you do, and what...