81 Results for "↘ 최저가 Ò1Ò〈⑻⑷89〉83Ò⑥ ↗ 강남술집정보♣ 쓰리아워가격ofㅓ쓰리아워쓰리아워가격쓰리아워레깅스룸access 쓰리아워가격ょ강남술집정보ｅ㈌강남술집정보bunch"

Super Hexagon FPGA clone
Project by Sam P
Clone of the PC/Android game Super Hexagon on an Altera DE1 FPGA
- 12
- 9

DIPSY
Project by Antti Lukats
DIY System on Chip based on FPGA, priced below 5 USD
- 467
- 247

FPGA Tips
Project by Antti Lukats
FPGA: What they are when to use and when not and if then how?
- 95
- 56

HDMI2USB.tv Open video capture hardware + firmware
Project by Tim Ansell
The HDMI2USB project develops open hardware to record and stream HD videos (from HDMI & DisplayPort sources) for conferences and usergroups.
- 2.5k
- 21

Universal Device Programmer
Project by audio.cf
Create the h/w and s/w for a 48 pin universal device programmer, fully open source with a device metadata configuration to add new devices
- 3
- 2

Bexkat1 CPU
Project by Matt Stock
A custom 32-bit CPU core with GCC toolchain
- 63
- 51

yapg
Project by Evan
yet another pixel globe
- 202
- 116

Simple CPLD Module - Rev 2
Project by Bil Herd
As seen in the Hackaday Video, this is a simple CPLD in a 40 Pin DIP footprint useful for installing a piece of of programmable logic.
- 28
- 18

The 'Configum' module
Project by Kn/vD
A full FPGA system in one square inch area
- 31
- 34

CPU7
Project by Kn/vD
A concept for a small RPN processor with interesting features
- 129
- 22

7400_logic_HDL
Project by Ethan Durrant
HDL implementations of the 7400 series of Discrete Logic ICs for use in simulation or on an FPGA.
- 10
- 8

Open Source FPGA
Project by Will Long
An open source FPGA implementation.
- 841
- 46

Phased Array Microphone using FPGA
Project by Martin Berglund
The idea is to do DSP on a FPGA with audio from microphones. This is a project I've started in order to learn FPGAs and Verilog.
- 491
- 9

SpinalHDL
Project by Dolu1990
SpinalHDL is an alternative hardware description language designed to provide many features that are missing in VHDL and in Verilog.
- 733
- 20

HDMI to LVDS panel converter
Project by Julien
Convert HDMI out from Rasperry Pi to scrapped LVDS panel with FPGA board
- 55
- 35

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