63 Results for "《〈 문의 OIO↗5793↗7458 》〉 셔츠룸ヒ《〈 문의 OIO↗5793↗7458 》〉㎛beforehandム셔츠룸후기셔츠룸후기╇pen 선릉셔츠룸셔츠룸가격 셔츠룸‰강남셔츠룸㉦nestㅳ"

Digital Audio Mixer w/ Filters & Multiple USB I/O
Project by MS-Dzo
Using FPGAs and MCUs to build my dream audio setup
- 14
- 1

LayerOne 2014 Conference Badge
Project by charliex
Electronic Badge, Based on the Proxmark3 with different FPGA, SAM7 , SDCARD and OLED
- 70
- 26

Arduino-Compatible FPGA Shield
Project by technolomaniac
Spartan 6 FPGA Shield includes SPI Configuration Flash, Breakout Headers, SRAM, programmable from Arduino or SPI Programmer
- 2k
- 397

HD6309 Singleboard Computer
Project by tomcircuit
Hitachi HD63C09 clocked at a blistering 3 MHz with a capacious 64K of RAM! Retroputing bliss...
- 184
- 62

Chameleon
Project by Michael A. Morris
FPGA shield board with XC3S50A/XC3S200A FPGA, 2 232/485 ports, 32Mb Flash, 4kb FRAM, 128kB SRAM, 12 Arduino UNO connections.
- 72
- 20

1 CUP
Project by DepletionMode
A Completely Useless and Pointless 8-bit home-brew computer
- 15
- 11

Hardware encryption part 1 XOR and Fiber optics
Project by Jeremy Hong
I built this circuit at Mhacks in Ann Arbor, Michigan and it took me about 18 hours to complete it.
- 2.1k
- 7

DIPSY
Project by Antti Lukats
DIY System on Chip based on FPGA, priced below 5 USD
- 467
- 247

Soft Propeller
Project by Antti Lukats
DIPFORTy1 "Soft-Propeller" Zynq-7, Dual CortexA9+ FPGA DIP40 Parallax Propeller I compatibles footprint
- 152
- 91

FPGA Sound Sampler
Project by Reynarduino
An FPGA-based sampler inspired by the Casio SK and Yamaha VSS series samplers.
- 127
- 5

FPGA computer
Project by Dylan Brophy
I am building a (currently) 64k RAM computer with an FPGA. Now with lots of pipelining!
- 39
- 34

snickerdoodle
Project by krtkl
ARM. FPGA. 180 reconfigurable I/O. Wi-Fi. Bluetooth. BLE. Size of a business card.
- 6.1k
- 70

yapg
Project by Evan
yet another pixel globe
- 202
- 116

The 'Configum' module
Project by Kn/vD
A full FPGA system in one square inch area
- 31
- 34

muCPU: an 8-bit MCU
Project by Reed Foster
An 8-bit load-store CPU with 2 pipeline stages, designed in Logisim and implemented in VHDL + assembler written in Python
- 44
- 35

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