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597 Results for "%E3%80%8A%EC%B5%9C%EC%A0%80%EA%B0%80 O1O%CE%9E5793%CE%9E7458%E3%80%8B %EA%B0%95%EB%82%A8%EC%95%84%EC%9D%B4%EB%A6%B0%EC%8B%9C%EC%8A%A4%ED%85%9C%E3%86%8B %EA%B0%95%EB%82%A8%EC%95%84%EC%9D%B4%EB%A6%B0%EC%85%94%EC%B8%A0%EB%A3%B8applause%EA%B0%95%EB%82%A8%EC%95%84%EC%9D%B4%EB%A6%B0%EC%8B%9C%EC%8A%A4%ED%85%9C%EA%B0%95%EB%82%A8%EC%95%84%EC%9D%B4%EB%A6%B0%EC%8B%9C%EC%8A%A4%ED%85%9C%EC%8B%A0%EC%82%AC%EC%95%84%EC%9D%B4%EB%A6%B0%EC%A3%BC%EB%8C%80caught %EA%B0%95%EB%82%A8%EC%95%84%EC%9D%B4%EB%A6%B0%E3%8F%87%E3%85%97%EA%B0%95%EB%82%A8%EC%95%84%EC%9D%B4%EB%A6%B0queer"

  • OpenCores PDP-8 on FPGA
  • Details     from OpenCores PDP-8 on FPGA
  • From OpenCores PDP-8 page: Features In this FPGA implementation, the PDP-8 CPU can be configured to emulate the instruction execution of a PDP-8 (Straight-8), PDP-8/S, PDP-8/S, PDP-8/I, PDP-8/L, PDP-8/E/F/M, PDP-8/A, HD-6100, or a HD-6120. The...

  • Building a CP/M System Disk
  • Log     from My CP/M Single Board Computer
  • Building a CP/M System Disk To avoid rewriting the assembler codes for ccp, bdos and cbios so that they can co-exist in the same file. I can append the i8hex files and remove the "end of file markers". To make the hex file more readable I have changed...

  • Mass production
  • Log     from Ph0xx
  • For those wondering how we assembled the boards, we compiled a video of all the different steps. We started off with prototype machinery (Mechatronika M10 and Mechatronika MX70), manual solder paste dispensing using a eC-Stencil-Mate and reflowing...

  • OPS ENUMERATED - Draft
  • Log     from TIS-100 (Geiger)
  • This represents a complete OPCODE list with 14 Constants (int values) available and 10 Labels (byte values) available for creating subroutines. Constants were favored over Labels, but this is up for evaluation. NOP and HCF were both added to the official...

  • Control Board FPGA Pinout
  • Log     from BARCO NX-4 GROUP REVERSING ADVENTURE
  • I might be missing a few connections yet which I'll correct as I come across them, but here is the pinout of the XC3S250E FPGA on the control board.  Note that the SRAM and the Flash share an interface bus.  Also note that the JTAG interface...

  • YGREC8
  • Details     from YGREC8
  • After the explorations with #YGREC-РЭС15-bis, I reached several limits and I decided to scale it down as much as possible. And this one will be implemented both with relays and VHDL, since the YGREC8 is a great replacement for Microchip's PICs....

  • Remapping the Keyboard
  • Log     from A DIY Keyboard
  • Remapping the KeyboardGiven most of the work is done with the "basic shift logic" how hard could it be?The basic shift logic:Well much harder than expected, here is the schematic:Now many will recognise this as a PLA (Programmable Logic Array).Designing...
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