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2800 Results for "%E3%80%8A%EC%B5%9C%EC%A0%80%EA%B0%80 O1O%CE%9E5793%CE%9E7458%E3%80%8B %EA%B0%95%EB%82%A8%EC%95%84%EC%9D%B4%EB%A6%B0%EC%8B%9C%EC%8A%A4%ED%85%9C%E3%86%8B %EA%B0%95%EB%82%A8%EC%95%84%EC%9D%B4%EB%A6%B0%EC%85%94%EC%B8%A0%EB%A3%B8applause%EA%B0%95%EB%82%A8%EC%95%84%EC%9D%B4%EB%A6%B0%EC%8B%9C%EC%8A%A4%ED%85%9C%EA%B0%95%EB%82%A8%EC%95%84%EC%9D%B4%EB%A6%B0%EC%8B%9C%EC%8A%A4%ED%85%9C%EC%8B%A0%EC%82%AC%EC%95%84%EC%9D%B4%EB%A6%B0%EC%A3%BC%EB%8C%80caught %EA%B0%95%EB%82%A8%EC%95%84%EC%9D%B4%EB%A6%B0%E3%8F%87%E3%85%97%EA%B0%95%EB%82%A8%EC%95%84%EC%9D%B4%EB%A6%B0queer"

  • Soldering perfboard

  • I took a perfboard and soldered up power and the data/address busses of the MCU, SRAM, NVRAM and the address bus latch.I did't really care about the exact order of the bits when wiring them up, I just went for the easiest layout. I'm not really sure...
  • All Your ISA Belong to Me!

  • Before I began the layout of the DDL4-CPU, I came up with an initial Instruction Set Architecture (ISA) for the design. It went through several revisions as I was designing the boards and refined the components. Here at the last minute as I am...
  • Updates

  • It's been nearly 2 years since my last log, and things are quite different from where I left it. I've been poking around at this project in between other projects and university, so most of these details are not recent. I found out that there has since...
  • Temperature sensors

  • Temperature is important in soilless cultivation. Articles agree on an ideal growing temperature between 18°C and 26°C. A too cold temperature will slow down growth but increase the dissolved oxygen in the water. While too hot temperature will...
  • Temperature sensors

  • Temperature is important in soilless cultivation. Articles agree on an ideal growing temperature between 18°C and 26°C. A too cold temperature will slow down growth but increase the dissolved oxygen in the water. While too hot temperature will...
  • Attempted architecture redesign (2022-08-19)

  • Original date: 2022-08-19 Related tweets: [1] [2] The RF test PCB was submitted to the PCB factory. In the meantime, I was trying to redesign the architecture to mitigate the problems of the current design: Power consumption is not low enoughIt...
  • Reverse Engineering from Package Data

  • As you can see airodump-ng picked up the WiFi of the drone and also that it is running on channel 2. Next I recorded some packages. sudo airodump-ng -w JJRC_out -c 2 -bssid 10:A4:BE:2E:77:B5 wlan0mon While recording I simply used all the functions the...
  • Board NEDONAND-6

  • NEDONAND-6 is 8 multiplexers 2:1 with common control (straight select and inverted select):Board already ordered through OSHPark:Pins description:1.1) GND - ground 1.2) O0 - output of multiplexer 0 1.3) O1 - output of multiplexer 1 1.4) O2 - output of...
  • YGREC8

  • After the explorations with #YGREC-РЭС15-bis, I reached several limits and I decided to scale it down as much as possible. And this one will be implemented both with relays and VHDL, since the YGREC8 is a great replacement for Microchip's PICs....
  • Remapping the Keyboard

  • Remapping the KeyboardGiven most of the work is done with the "basic shift logic" how hard could it be?The basic shift logic:Well much harder than expected, here is the schematic:Now many will recognise this as a PLA (Programmable Logic Array).Designing...