This entry is just an announcement of start of building the Register File component. It should serve as the statement of commitment.
The Register File will have eight 16-bit registers, and their selection logic.
Here is how I envision its boards arrangement: there would be just 3 big boards ( two 8-to-1 multiplexer boards, and one "RF backplane" board, which will have a handful of chips on it and 8 slots for small register boards), and 8 small boards each having two 74HC273 chips and LEDs indicating content and selection status. The individual small register boards are to be connected to "RF backplane" through pin header connectors.
I am not sure if I need single interface board similar to one I've done for ALU.
Overview schematic of Register File to be built: