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ZEXALL Instruction Set Test

A project log for 3-Chip Z80 Design

Combining a Z80 retro design with a modern PSoC CPU.

land-boardscomland-boards.com 11/02/2019 at 13:430 Comments

Trying to run the benchmark zexall Z80 Instruction Set Test. The program is hanging on accessing the SD card.  The code is doing something I didn't expect. It's sending a command to the SD card that isn't 0x01 (wrote block) or 0x00 (read block). 
It is sending a 0x2C command to the SD card interface. Not sure what that command is since the code I modeled the PSoC interface only used 0x00 and 0x01.

Fixed the SD Card Hang

Running now. Put in code to ignore anything other than 0x00 and 0x01. Not a great solution but waiting to see if it passes the Instruction Set Test before tackling it.

Took quite a while at 10 MHz CPU Clock speed. Printing is messed up due to some of the formatting of the messages with greater than and less thans in the message.

A>zexall
Z80 instruction exerciser
 hl,....  OK
add hl,..........  OK
add ix,..........  OK
add iy,..........  OK
aluop a,nn....................  OK
aluop a,..  OK
aluop a,.....  OK
aluop a,(+1)...........  OK
bit n,(+1).............  OK
bit n,....  OK
cpd........................  OK
cpi........................  OK
.............  OK
 a...................  OK
 b...................  OK
 bc..................  OK
 c...................  OK
 d...................  OK
 de..................  OK
 e...................  OK
 h...................  OK
 hl..................  OK
 ix..................  OK
 iy..................  OK
 l...................  OK
 (hl)................  OK
 sp..................  OK
 (+1).........  OK
 ixh.................  OK
 ixl.................  OK
 iyh.................  OK
 iyl.................  OK
ld ,(nnnn).............  OK
ld hl,(nnnn)..................  OK
ld sp,(nnnn)..................  OK
ld ,(nnnn).............  OK
ld (nnnn),.............  OK
ld (nnnn),hl..................  OK
ld (nnnn),sp..................  OK
ld (nnnn),.............  OK
ld ,nnnn.........  OK
ld ,nnnn...............  OK
ld a,<(bc),(de)>..............  OK
ld ,nn....  OK
ld (+1),nn.............  OK
ld ,(+1)......  OK
ld ,(+1)..........  OK
ld a,(+1)..............  OK
ld ,nn.......  OK
ld ,........  OK
ld ,........  OK
ld a,(nnnn) / ld (nnnn),a.....  OK
ldd (1)....................  OK
ldd (2)....................  OK
ldi (1)....................  OK
ldi (2)....................  OK
neg...........................  OK
.....................  OK
...........  OK
shf/rot (+1)...........  OK
shf/rot ..  OK
 n,.....  OK
 n,(+1).......  OK
ld (+1),......  OK
ld (+1),..........  OK
ld (+1),a..............  OK
ld (),a................  OK
Tests complete
A>

Tests passed.

15 Mhz Hung

Tried 15 MHz (using the 10 MHz CPU) and it did not finish the first test. Not sure if this is a CPU problem or something to do with the peripheral emulation. The clock is a 50-50 duty cycle so it's probably not that.

12 MHz Passed

Running 12 MHz and it passed. That would be a 2-3 duty cycle clock so it surprises me that it passes.

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