prototype0b-screenshot.jpg

JPEG Image - 635.61 kB - 10/01/2020 at 21:54

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prototype0b-hardware.mp4

This is the new hardware I've patched into my existing computer. On the left is the page table RAM and a NAND IC; on the right is a modified write-only debug port being used as a PID register.

MPEG-4 Video - 39.58 MB - 10/01/2020 at 01:20

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prototype0b-output.mp4

Video output from Prototype 0b. Two processes are running alongside the supervisor, with preemptive multitasking driven by wiring the 50Hz vsync signal into the CPU&apos;s NMI pin.<br><br>RAM is split into eight pages; each process gets one for its stack and other storage, plus one of the four pages that cover video memory. The supervisor also had a page for its general storage and a page of video memory.<br><br>The processes are each printing their register contents. They increment X continually while running.<br><br>The supervisor is displaying the total number of times it has run the scheduler.

MPEG-4 Video - 30.02 MB - 10/01/2020 at 01:19

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blockdiagram-prototype0-2.png

Block diagram of Prototype 0 - extending the original architecture with paged memory and multiprocessing, but not protection yet

Portable Network Graphics (PNG) - 79.89 kB - 09/27/2020 at 15:26

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blockdiagram-originalcomputer2.png

Block diagram of the original computer that I&apos;m using as a base to extend and add protected memory

Portable Network Graphics (PNG) - 47.96 kB - 09/27/2020 at 15:23

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