This came about because I bought a box from Belkin to do AirPlay 2 for our patio speakers (which have an amplifier I built myself). That Belkin box's analog audio output is about 20 dB too low, but fortunately they include a TOSLINK output jack. Buying the aforementioned $10 box from Amazon solved my problem, but I'd kinda like to know how to build the equivalent.
The current design comes down to three separate subsections.
First is a TOSLINK receiver module. This is a little plastic thing that takes in 5 volt power and outputs a TTL level stream matching the optical input. There isn't a whole lot to say about this. It's self-contained and just needs a single bypass cap and series inductor for the supply pin. The optical signaling is biphase encoding. This makes for easy clock extraction. Between every clock period the signal changes state. If the input pulse train is the same bit level as the previous bit, then nothing else happens. If it's different, then at the 180º mark there is a second state change. So for an input clock frequency of 1 MHz (just an example), a series of either 00000... or 111111.... is represented by a 1 MHz square wave. A series of 01010101.... is represented by a 2 MHz square wave.
The next section is the digital data stream receiver. For this, I chose the STA120. It unfortunately requires 3.3 volt power instead of 5 (which is what every other part of the board needs). It has a number of pins that are tied either high or low to configure it, and converts the S/PDIF input stream into an i2s compatible output stream for the DAC. It's configured in this case for "mode 2," which seems to be the best choice for i2s output. It's set up to send the master clock, SCLK, L/R, and data output to the DAC.
It turns out that the STA120 is nearing obsolescence, so an alternative is the DIR9001. It's not at all compatible, but like the STA120, it's configured with a number of strapping pins, accepts the input from the optical receiver module and outputs the same 4 lines to the DAC.
The original DAC was a CS4334. It takes i2s input. This consists of the master clock (SCK), bit clock (BCK), L/!R (LRCK), and DATA. Instead of the BCK signal, you can send a de-emphasis selection signal from the STA120, but when I attempted this with a prototype the audio sounded noisy. It would seem that when you don't send SCLK, the CS4334 makes assumptions about the relationship between SCK and the frequency of LRCK to derive an internal bit clock. This seems to not work for the output format of the STA120. That, and the !DEM signal was always high, which implies that emphasis on the digital signal is never used, so there's no harm in not supplying that signal to the DAC.
Along the way I decided to attempt to design something a bit better. This started with the PCM1793 192 kHz 24 bit DAC. That DAC has fairly impressive THD and S:N specs, and requires an external differential to single-ended converter and LPF. That uses the OPA2134 dual op amp, which is also an impressive part in and of itself. The unfortunate part of this design is that the input sample rate is constrained to 96 kHz because of the DIR9001. I haven't yet found a reasonable replacement for that part that doesn't require the addition of a controller to the circuit. As before, the output DATA, BCK, LRCK and SCK (configured at the DIR9001 for 256xFs) are fed directly. In addition, I decided to connect the ERR output of the decoder to the MUTE input of the DAC, just to insure bad data doesn't turn into bad sound. Since the DAC has separate de-emphasis selection pins, I decided to try to support it for the sake of old CD players and the like. Unfortunately, the DIR9001 only has a single de-emphasis output signal and there are four possible de-emphasis configurations, depending on sample rate. It's not convenient to try to figure out which mode to use, so I settled on simply supporting only 44.1kHz de-emphasis, which is the only...Read more »