BrainfuckPC Relay Computer

Von-Neumann 16-bit relay computer with Brainfuck++ instruction set

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This is a Reed Relay Computer on soviet reed relays with Von-Neumann architecture and esoteric programming language "brainfuck" instruction set. a BrainfuckPC.

All compute logic is mounted on 192 modules (60x44mm PCB, with 4 relays on each) placed on 6 blocks (150x200mm), 32 modules on each. Blocks are wire-wrapped.
IC-based RAM, 128KB, or 64K Words x 16 bits.

Working frequency - up to 100Hz. And as we can modulate clock by external MIDI device, we can play a music while our application is running.


Tens of thousands of people creates they own programs on brainfuck esoteric programming language. 

Thousands - creates they own brainfuck compilers or emulators to run their creation.

But the only one man tries to create Brainfuck Relay Computer.

BrainfuckPC (BFPC) - is a computer on reed relays, which can execute brainfuck commands natively, without any compilation into other assembly (just need a translation to 16-bit instructions representation). All main instructions are corresponds to eight bf commands.

BrainfuckPC 3D model in Fusion 360(Clickable). Dimensions 1000x650mm

Central compute  element is a 16-bit full adder. Four 16-bit registers for storing temp values and context values. Static RAM 128Kbytes (64K words). And some latches and controlling logic to support. 

Brainfuck++ instruction set

Each instruction two-bytes wide. 

bits 12-15 - contain opcode. Bits 0-11 - contain payload.

NOP instruction has no reaction in relay logic

CTRLIO instruction -  gives some machine controls - implements Console read/Write support, change console modes, switch 8/16 bit jump logic block mode - so you can run classic 8-bit brainfuck porgrams, or extended 16bit wide ones.

ADD, ADA, JZ, JNZ instruction use adder and old value of IP, AP register or data under AP cell changed by 12bit const value. 

It's a signed operation, and 15, 14 and 13 bits  are replay the value of 12bit - So with instruction 0x3fff you get 0xFFFF value (or -1).

MIDI controlled program execution

As maximum working frequency is 100Hz, and as we can modulate clock using some MIDI device, we can play some music using just a relays knocking sounds!

Unfortunately, current max working frequency of all CPU - is 25Hz. 

  • 439 × RES55 USSR Reed relay with 1C contact group
  • 64 × RES64 USSR reed relay with 1A contact group
  • 64 × RES43 USSR reed relay with 2A contact group
  • 157 × PCB module 60x44mm different PCB modules
  • 5 × Base PCB plate 200x150mm PCB each for 32 modules

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  • Pi =4 and another relay computing bugs

    Artem Kashkanov03/14/2019 at 19:36 0 comments

    Turn on subs..

  • Pi = 4! My Relay computer think so..

    Artem Kashkanov02/22/2019 at 07:14 0 comments

    I ran Pi program calculation on my relay computer. And after 25 minutes of calculations (~30000 retired instructions) It shows me, what he think about Pi number. 

    Remember this meme?

    It's not a meme anymore!

  • Run Hello World on BrainfuckPC on 25Hz

    Artem Kashkanov02/16/2019 at 15:34 1 comment

    I connected VFD to my relay computer and run Hello world on "Brainfuck" on 25Hz

  • Perhaps, the world's fastest relay computing

    Artem Kashkanov01/28/2019 at 08:50 5 comments

    First program works!  In a cycle I'm doing ADD+ADA operations on 25Hz!


    0: NOP

    1: ADA+0xFF00 - set Address register to 0xFF00

    2: ADD+1 //increment value in current memory cell

    3: ADA+1 //shift current memory cell number

    //repeate last two instruction 16 times, because writing inner loops in brainfuck is brainfuck enough :)

    33: ADA-0xF //return AP to 0xFF00 memory cell

    34: JNZ-0x21//if current cell is Not Zero, return IP to number 1 (which would be skipped due to pc arch). 

    All instructions are repeated.

  • instruction fetching stage works!

    Artem Kashkanov01/18/2019 at 21:05 0 comments

    Instruction fetching stage is one of two main stages - fetching and execution.

    We need to write old IP register(right block, top) value to TMP register (left block, top) and using full 16-bit adder do IP+1 operation.

    The result of this operation as saved back to IP register.

    After we got new IP, we send reading strobe to RAM, and new instruction goes to DATA line. Now we just need to write it to CMD register (Left block, bottom) and goes to execution stage.

    As RAM was inited with 0x5555 and 0xAAAA values we see how on odd IP numbers Odd bits  on CMD register are flashing, and on even IP values - even bits.

    Bottom line of switching boards have leds which are showing current DFATA line state and odd-even switching is observed well

    With high fps camera both stages are visible very well

  • Clock system is ready

    Artem Kashkanov01/18/2019 at 08:14 0 comments

    I wire-wrapped clock system! the idea is to do instruction fetching stage and execution stage in one clock cycle. So we need to run impulse sequencer two times, on every clock signal edge.

    I used simple schema with XOR element and D-trigger to do this and now everything works fine.

    On high-speed camera you can see, how impulse sequencer signal wave is going.  And this process happened two times per one clock period.

    Is Lights of impulse sequencer are flashing only ~10 ms of half-period it's funny to see how camera doesn't detect it because of stroboscopic effect.

  • Output driver replacement for Memory board

    Artem Kashkanov12/06/2018 at 09:48 0 comments

    Previously I found, that my output drivers on TLP281-4 couldn't open just one relay... So I have to replace schematic and developed more powerful driver base on P-MOS.

  • Yet another relay modules

    Artem Kashkanov12/02/2018 at 16:43 0 comments

    Made driver modules for BFPC. 

    Control line need to be supplied with 0.5-0.7A current and my RES55 end RES64  would be broken if I will use them for this.

    So I took 1A reed relays and made just a driver.

  • ADA/ADS Instructions timing diagram

    Artem Kashkanov11/21/2018 at 21:01 0 comments

    ADA/ADS instructions are used for walking through memory - we can change current AP register with some constant value.

  • Signal sequencer is not an easy task

    Artem Kashkanov11/20/2018 at 21:23 0 comments

    Just created waveform for new instruction fetching - we need to do IP++ operation and with new IP address load instruction from memory.

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Keri Szafir wrote 12/09/2022 at 12:18 point

Amazingly beautiful in its complexity!

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ATmel91 wrote 12/14/2019 at 02:30 point

You.. YOU are a legend!

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Andrey V wrote 08/16/2019 at 10:33 point

У меня бы терпения не хватило собрать такой девайсю

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qwerty.lifirenko wrote 01/29/2019 at 20:34 point

Недурно так сделано

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Dr. Cockroach wrote 04/16/2018 at 21:46 point

Yes, yours will be the first relay BF computer and I hope to have perhaps the first DTL BF computer :-)  has a nice sound to it :-) Your build is looking fantastic Artem :-)

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Dr. Cockroach wrote 04/06/2018 at 22:11 point

I agree, well done :-)

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Artem Kashkanov wrote 04/07/2018 at 18:44 point

Thanks!  One more stimulus to complete this project

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Artem Kashkanov wrote 04/07/2018 at 18:42 point

I miss this :) Thanks for the link)

Very interesting ethics discussion, but I do not rename this project :) 

Perhaps I should not tell them that the DekatronPC would have BF instruction set too :)

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Yann Guidon / YGDES wrote 01/15/2018 at 22:56 point

You have progressed well ! It's cool to see :-)

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Artem Kashkanov wrote 01/16/2018 at 08:41 point

Yep! After I got pcb's I began to work actively on the project. I had to order them before instead of making them manually, but... :)

I want to have minimum working set (Adder+Latches+Registers+Memory) with MCU controlling for generating sequences for nearest April's fools day - there should be really cool article to reddit and geektimes resources.

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Yann Guidon / YGDES wrote 01/16/2018 at 08:43 point


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Yann Guidon / YGDES wrote 11/06/2017 at 00:24 point

Hello :-)

Are there any updates lately ?

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Artem Kashkanov wrote 11/12/2017 at 14:57 point

Yes) Today

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Yann Guidon / YGDES wrote 11/12/2017 at 15:26 point

Awesome !

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Yann Guidon / YGDES wrote 03/31/2017 at 18:47 point

Do you have estimates of the power supply requirements ?

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Artem Kashkanov wrote 03/31/2017 at 19:52 point

Each base block would consume up to 5Volt and 2Amps. And Up to 2 Amp for memory board and vacuum indicator panel (approx 30pcs of soviet IV-6 tubes, which schematic is still in draft).

So 14Amps is not so much for this. Thanks to reed relays :-) I will use 25Amp 5Volt power supply.

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Yann Guidon / YGDES wrote 03/31/2017 at 20:54 point

so it's in the range of 120W...

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Dr. Cockroach wrote 03/31/2017 at 00:05 point

That is really awesome, I will be watching this :-)

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AVR wrote 03/27/2017 at 14:23 point

this is so hardcore, much respect!!!

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Yann Guidon / YGDES wrote 03/27/2017 at 10:17 point

A nice addition to #Relay-based projects :-)

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Artem Kashkanov wrote 03/27/2017 at 11:50 point

Yes, very good idea.  :-)

  Are you sure? yes | no

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