The datasheet for this chip proudly touts SPI support, but looking beyond the front page of the datasheet reveals a custom communication protocol more similar to I2C (or at least I think so). This protocol requires 4 wires (+GND).
> CSB: Chip selection for register access, active low
> FCSB: Chip selection for FIFO access, active low
> SCLK: Clock (+ve edge)
> SDIO: Data input and output
The timing diagram is shown below. For basic register access I will be ignoring FCSB.
Since I’m on a bit of a deadline here, I decided to bit bang the protocol (I’m sure there’s an elegant way to do this, but that’s for another day). Here’s the rough code I have for reading data from the device.
As an example, if I look at some registers, I can read out valid contents shown below.
In the scope capture, there’s a short spike between the RX and TX bytes. This is caused by the handoff between the pi pico and the CMT2300A. I have a weak pullup on the line, so data starts to rise to VCC before being pulled down by the slave.
That’s all for now… transceiver is talking so I can do some register poking to put it through its paces.