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Homebrew 16 bit relay computer

Goal of the project is to develop and build a homebrew 16 bit relay computer

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The new relay system is a classical Accu CPU like some CPUs of the good old 80s. The system was simulated using the game "Logic World", now the real world build has startet!

If you want more information: you find the link to the project homepage on the left. And the complete circuit diagram in the download area. Just for fun.

Overview

The system ist a very simple CPU using an Accu register like CPUs in the 80s.  All mathematical operations are using the Accu, also all store / load operations. And, because it is a "High Performance" relay system, the program counter has its own adder which is only able to add 1 to the program counter.

Here you see an actual picture of the complete system:

The following diagram shows an overview about the system structure:

Note: The PC_HR register is necessary, because I can not write the changed PC based on its own value plus 1 direct into the PC...

One detail is important to understand the design of the system: all registers, which are realized by "self retaining" relays, have to be cleared before any information can be stored, also before the stored information can be changed. Thats the reason why the clock of the system is not an ordinary clock as you know it from digital systems. The clock of this system consists of 4 different pulses:

The control unit of the system is using the instruction register and a state register to select the control lines, a control line timing module is setting the Clear, Input-enable and Output-enable control lines based on the clock information.

And, of course, there is not only a state register...there is also a second state register which is cleared / loaded during cycles 0 and 1. You see this detail in the structure picture and in the circuit diagram. It is the same principle than I have to use for the program counter.

The following table shows the command set of the CPU:

The CPU is able to adress the memory using 3 different adressing modes. a) LD X is loading the Accu with the dataword stored in the adress after the opcode, b) LD M(X) is loading the Accu with the data stored in the memory adress stored after the opcode, and c) LD M(M(X)) is ... yes, indirect adressing. The dataword after the opcode contains the adress where the CPU finds the adress of the dataword that will be stored in the Accu. Is adressing mode c) really necessary? Maybe not. But it makes it easier.

And, as you can see, a CALL / RET set of operations is also avaliable. No, there is no stack realized, only one subroutine level is possible. The return adress is stored in the register SR.

The Simulation using "Logic World"

The following images show the Simulation of the complete system in the game "Logic World". This simulation was used to design the system and to check different design variants.

The relay element:


System overview:

Circuit diagram

The complete system circuit diagram is avaliable in the download section.

The software simulation:

To check if the command set of the CPU is useful, a software simulation using an Excel macro was developed. Using this macro it is possible to step through the code, watch registers and memory and to go forward until a breakpoint. The following picture shows the simulation with an program which multiplies two numbers using shift operations.

CircuitDiagram_051123.pdf

Circuit diagram of the relay computer

Adobe Portable Document Format - 1.67 MB - 11/12/2023 at 15:52

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  • 1 × 24V Relay
  • 1 × Diode

  • Build and tested the first ALU bit...

    Peter5 days ago 0 comments

    So, the first ALU board is build and tested...and it is working! Now I will start building the remaining 15 boards.

  • ALU PCB finished!

    Peter04/09/2024 at 13:27 0 comments

    For the system I need a circuit with 13 relays for each bit of the ALU...16 times the same circuit! Building this connection by connection wouldn't be a very enjoyable task. So, a friendly colleague offered me to design a PCB out of my circuit diagram. I am truly very grateful to him for it.

    And this is the result. It only took 1 week from the purchase order to the delivery:

  • Finished the accumulator register

    Peter04/09/2024 at 13:10 0 comments

    So, the 16 bit accumulator register, which the register for all mathematical, all store and all load operations, is finished and tested. The next step is to connect the register to the system...

    The 16 black relays with numbers are responsible for storing the bit values (by holding themself in an active state), the black relay without a number releases the VCC (for clearing the stored value) and the orange relays are responsible for Input and Output to/from the databus.

  • Added a little communication PC

    Peter04/09/2024 at 12:46 0 comments

    So, I recently added a little PC just for communication, connected to the arduinos and the logic analyzer. And reachable via remote desktop. The following picture shows you the bottom of the system:

    There you see the memory, the new communication PC and the clock. The yellow marked part is a poti connected to the arduino which is responsible for the clock generation to change the speed of the system.

  • Measured the relay timings

    Peter03/27/2024 at 21:41 1 comment

    So, I measured the timing behaviour of the relay using an oszi. This was my test setup:

    I used an arduino to switch on/off the blue relay (its the same type than the relay of the timing module and the memory module of the relais CPU) using the 5V of the arduino, the blue relay is using its switches to switches on/off the black relay using 24V. The output of the black relay is connected to a LED.

    The first two diagrams show the switching of the blue relay, yellow is the arduino signal, blue the relay output:

    The switch on time of the relay is 5,44ms.

    The switch off time is 3,56ms.

    Now the measurement of the black 24V relay. which is much more important...because this is the relay which is used for 90% of the relais CPU. The blue 5V relay is only used as an arduino output for clock and memory.

    The switch on time of the relay is 2,16ms, thats very fast. The bouncing of the relays is visible, but not a very big problem.

    The switch off time is 2,84ms...also very fast.

    Summary of the test: the used relays are faster than I thought!

  • Started the next module...the accu.

    Peter03/27/2024 at 18:47 0 comments

    Here you see the beginning of one of the most important modules of the system...the 16bit accu:

  • Test and video with high speed

    Peter03/14/2024 at 18:30 0 comments

    In the following video you see the system running with high speed and out of the system memory. I replaced one of the clock relays, this improved the stability of the system a lot!

  • Changed a clock relay...

    Peter03/13/2024 at 19:26 0 comments

    So, as described in my last project log, I changed the relay of clock 0 (which looked a little bit bouncing). Thats the result with the oszi:

    The signal looks much better than before. And the CPU was running with this speed (14,6 ms compared to 27 ms) for minutes without crashing. No, thats not a proof that the clock 0 signal quality was THE reason of the crashes with higher speed, but the bad signal quality before was possibly A reason...

    And after that success I wanted to know how fast the system now is able to run. That was the result:

    The system was running very stable with a very high clock speed, clock 0 was down to 10 ms...the next two pictures show you the logic analyzer pictures:

    First an overview, the measure time is 33 sec, but the system was running for a longer period:

    And a detailed view:

    Maybe I reached a stable situation and the system timing and the memory software is...not perfect yet, but OK.

  • Timing measurments

    Peter03/12/2024 at 17:23 0 comments

    If only the control unit was running, receiving the opcode of a command directly from the arduino which generates the clock signals, the timing of the system was very fast. A NOP command was finished within 128ms.

    But the connection of a memory based on a arduino changed the situation. Now the timing is more difficult...and I tried to figure out what is happening, because the system now runs perfect with high speed and sometimes, could be after 10-20 commands, it crashes.

    The following tests were made with a slower speed, the system was running very stable, without any crash.

    Here you see a logic analyzer picture of Clock 1:

    You see a interesting thing: the signal of Clock 1 looks not very good. The rising edge of Clock 2 for example looks much better. The signal time of Clock 1 was 26,8 ms, which is not very fast. The fastest Clock 1 time I tested (without a memory module) was 7ms. I was not sure if the signal realy looks that way or maybe the logic analyzer is showing something wrong. So I used a Oszi:

    The first thing to notice: the timing measure is very accurately. The second thing: The signal does not look very good, even on the Oszi. If I reduce the signal time to 7ms no stable state will be reached. I checked another clock signal, Clock 2:

    and the Oszi picture:

    This Clock looks much better, in the logic analyzer and in the Oszi (Clock 2 is 10ms longer in High than Clock 1, this is correct).

    The last signal I checked was the input enable of the program counter:

    looks perfect in the logic analyzer. The Oszi measures:

    Thats an excellent signal.

    What is the result of the measurement? The relays have very different quality, and the relay generating clock 1 seems to be one of the worse relays. I will change the output relay of Clock 1 and see what happens.

  • Crash Video...

    Peter03/11/2024 at 13:38 0 comments

    Hello, the following video shows you the crash of the relay CPU...and explains the reason for the crash. I thought that the bad wiring of the system was the reason for the crash, but in reality there are 2 reasons...a) a SW bug in the arduino software, I used pow(x,y) to calculate the adress delivered by the relay CPU, this did not work as I expected and b) some timing problems in the memory module (I am still fighting a little bit with the timing, but I will explain this in a later video).

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Ken Yap wrote 02/25/2024 at 23:44 point

👍 I commend you on your persistence with this epic project. I'm sure it will be a classic work when it's done. Looking forward to seeing that.

  Are you sure? yes | no

Peter wrote 02/28/2024 at 20:43 point

Thanks for your encouraging words. My plan is to be finished at the end of 2024...we will see.

  Are you sure? yes | no

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