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FAR

Fixed-rate Asynchronous Receiver. Extremely simple asynchronous serial input to parallel data output converter.

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FAR is a simple circuit that can be connected to the RS-232 serial port of a computer and used to drive e.g. LCD display. The circuit uses only two 555 timers and one shift register. No MCU programming required.

http://youtu.be/p0rXdaHfxRI

The difference between this circuit and other similar projects is that this project does use the TxD pin of the COM port and it does not require any complex IC. All other projects that I found either use programmed microcontrollers or bit bang the meta signals (DTR or RTS) of the serial port.

The circuit consists of two 555 timers. The Start bit of the TxD signal of the serial port triggers the first 555 in monostable mode (byte timer). The output of the byte timer enables the second 555 (bit timer) by disabling its ~reset signal. The bit timer then generates the clock for the asynchronous TxD data to be stored in the shift register. At the end of the timing period the byte timer stops the bit timer by enabling the ~reset of the bit timer so that the bit timer generates exactly 9 clock pulses: 1 Start bit + 8 data bits. At the same time the byte timer output (the end of the timing period) enables the strobe signal of the shift register. The 9th clock pulse shifts the 8th data bit into the shift register and at the same time it shifts the Start bit out of the shift register before the strobe signal puts the internal contents of the shift register to the output pins of the IC. The byte length and bit clock frequency are fixed and pre-defined by used parts for the monostable and astable 555 timer respectively. The circuit was successfully tested at 9600 bit/s.

Uploading schematics to hackaday.io is clearly a fail:

Please right-click the above image and select "View image" to see the schematics.

Timing diagram:

  • The Start bit of the asynchronous data (serial port TxD) triggers the Byte timer
  • The Byte timer starts the Bit timer
  • The Bit timer generates clock pulses that shift the asynchronous TxD data into the shift register
  • The Byte timer stops the Bit timer
  • The Byte timer generates strobe signal for the shift register

The red lines represent important delays:

  1. The byte timer period must end before the bit timer generates 10th clock pulse rising edge
  2. The shift register strobe must follow the rising edge of the last bit clock pulse

Please note that this circuit exploits the charasteristic of the 555 astable mode - the first pulse (time high) is longer than the rest as the timing capacitor must charge from 0 V to 2/3 Vcc but for the rest of the operation it has to charge only from 1/3 Vcc to 2/3 Vcc.

The 555 timers are explained above, the shift register stores and outputs the byte, the NPN transistors invert the signals as needed and at the bottom right, there's a pin header to connect the LCD module I used for (successful) testing. The connection to the LCD may seem strange - the explanation is that the LCD was bit banged by waveforms created by the shift register output pins (I wrote a small C program to control the LCD and output texts to it).

  • 2 × 555 timer
  • 1 × 74HC595 shift register

  • Schematics and detailed description

    Filip12/27/2014 at 22:43 0 comments

    I've added the schematics and detailed function description. I'll also add the waveform details and timing adjustment instructions - unfortunately an oscilloscope is needed to exactly match the serial port TxD, byte and bit timers. I hope that the need for oscilloscope can be eliminated by adding some LEDs and using software to feed special calibration patterns to the serial port.

  • Second prototype testing

    Filip08/19/2014 at 16:21 0 comments

    The tests were complicated by the fact that Chinese manufactured transitors are of very low quality. The ones already on the board had to be desoldered, new ones tested and placed. Due to a stupid mistake 4 PCB traces are missing, but that can be fixed quickly and proceed with tests. The software will be modified as the second prototype uses different bit ordering. The original was rather counter-intuitive.

  • Second prototype

    Filip08/19/2014 at 16:16 0 comments

    Second prototype does not use the 7400. It is replaced with 2 transistors and the PCB is slightly redesigned.

  • Initial prototype testing

    Filip08/19/2014 at 16:15 0 comments

    The first prototype was successfully tested, it is able to drive an LCD display with a specialised software written in C.

  • Initial prototype

    Filip08/19/2014 at 16:14 0 comments

    The first prototype uses 556 dual timer and 4094 shift register. For signal inverting it uses 7400.

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