Version D

A project log for One Bit CPUs

I have been exploring one bit CPUs. For the right application they may be worth knowing.

agp.cooperagp.cooper 09/01/2017 at 05:230 Comments

Version D

Still paying with the design, usually this means that the design is not done.

It's just something you know and can not explain, i.e. "You can do better!".

So yes, Version D is much better:


  1. Used the spare I/O byte as page memory (cost two chips), I can now access all the memory on the PEROM (that what the datasheet calls the Flash memory).
  2. Used bit 7 of the IO byte to set the output high or low rather than read a high or low input.
  3. Used bit 6 of the IO byte to determine if the I/O is read or write (cost two decoder chips).
  4. So I can read and write up to 64 inputs and outputs (base board has six inputs and outputs and two memory bits).
  5. The design is very simple! 
  6. For the PCB design I can add a port for expansion of additional I/O as required.

The timing diagrams basically show the relationship between the signals, the address decode based on DIN high or DIN low and that the signals are glitch free.


For the PCB I have used jumpers to switch between memory bits and input switches, and provided expansion ports (... well you never know!). The PCB was a bit of a rush last night so the layout could be improved but it is been fabricated now:

Here is the schematic:

Including postage the PCBs (for five) cost US$33, you cannot complain other than I only really want one PCB.

Assembled and Waiting a Programmed Flash ROM

Here is the assembled board. I must have been in a rush as the components are all over the place!