--IIR Audio filters (2, 4, and 6-pole, 47 kHz sample rate ):
18-bit, fixed point FSM
27-bit, fixed point FSM
18-bit, fixed point using a cpu
18-bit floating point using Second Order Sections (SOS)
--IIR 50 MHz 18-bit, fixed point using parallel pipeline
--16-bit fixed point CIC (cascaded integrator-comb)
--Soft Radio Transmitters: AM, FM
--Physical (Karplus-Strong) String synthesis
--Adaptive noise cancellation
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- Audio filter implementations
All of these implementation use a multiply-and-accumulate (MAC)
scheme to compute each of the terms on the right side of the following
equation, then divides by
a(1), if necessary. Some of the implementations are serial, some are parallel. Some are fixed point, some floating.
a(1)*y(n) = b(1)*x(n) + b(2)*x(n-1) + ... + b(nb+1)*x(n-nb)
- a(2)*y(n-1) - ... - a(na+1)*y(n-na)The actual filter form implemented was the Direct Form Type I transposed similar to what Matlab uses for its
If a(1) is not equal to 1, you must divide the right side by a(1).
function. This means that the Matlab filter design funcitons (which
yield the a's and b's) can be used to design filters. Input is from the
audio codec and output is back to the audio codec.
There are a set of modules which are needed for all of the test programs below which interface to the audio codec. They are: cpuclockPLL.v, I2C_AV_Config.v, I2C_Controller.v, Reset_Delay.v, AUDIO_DAC_ADC.v and VGA_Audio_PLL.v.
Each of the filter implementations has one top level module which needs
to be incorporated into the project (using the menu item:
project>Add/Remove files in project). The project with all top-level
modules and interfaces is zipped here (QuartusII version 8.1). All of these filters receive input from the audio
line-in (blue phone jack) and send output to audio
phone jack). The project archive (QuartusII version 10.1) using 18-bit
fixed point filters (and a slightly different audio out register
structure) is here.
General second, fourth and sixth order IIR (18-bit fixed point) .
The first implementation top-level module
has modules for 2, 4, and 6th-order IIR audio filters synched to run
once/audio sample (about 47 KHz). Each filter runs in parallel with all
the other filters and each filter uses one 18-bit multiplier, so that
you could implement up to about 35 filters. The filters use 18-bit, 2's
complement notation with 16 bits of fraction for both the signal and the
coefficients. This means that all filter coefficients have to be scaled
to the range
-1<coefficient<1. The matlab code to do
the scaling and conversion to hex constants will produce estimates of
the scaled constants which you must check for being in range.
A matlab program to form the Verilog to specify the filter is at the
end of the Verilog file as a comment. Typical Verilog filter code
generated by the Matlab program is shown below. You must rename the
module, and substitute in appropriate input and output variable names.
The matlab program computes the a and b values, scales them to avoid
overflow, and converts them to hex. The matlab program also plots the
exact filter solution as well as the scaled 16-bit approximation.
Always check the approximation to verify filter quality. The book Digital Signal Processing and the microcontroller was very useful for this code (see reference below).
An example of the generation of filters by creating the filter Verilog code in Matlab. The normalized filter cutoffs (
[0.1 0.2], for a 4th order filter, and scaled by
Always check the approximation to verify filter quality. The plot below
shows the result of coefficient truncation error on filter response.
) ; //end filter
General second, fourth and sixth order IIR Filter (27-bit fixed point) .
This implementation extends the precision of the filters to allow
accurate, lower bandwidth filters. As before the code modularizes the
IIR filters and simplifies...
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