Created a branch which simulates controlling a CPU memory from the Front Panel. Made the memory an 8KB, Dual Port SRAM in the CPU. Able to read/write the memory.It works! Front Panel controls are: The bottom 8 Pushbuttons/LEDS control d0-d7 of the SRAM....
I will first focus on redesigning the CPU. I don't think the design will change much from a high block level, but most of the chips will be different. I had to make a couple compromises like I'm gating the clock to some of the 74LS374 which...
I want to add a quick note for operation of the CPU.The CPU only does move instructions. So each instruction is a source address and a destination address. The memory map of the processor is simple:Address: Function0: Trash...
I like the idea of two separate boards, a common G8PP memory/IO/CF board, and a CPU board. I've designed 5 CPU boards with that concept in mind. These CPU boards have male RC2014 connector on one side and female RC2014 connector on the other...
Modern microcontrollers and microprocessors have built-in facilities for external debuggers to read/write registers, set breakpoints and generally fully control the CPU. This is one of the main usecases of the standard JTAG interface. The 6502 and 65816...
First, semi-experimental board with fast adders was completed at spring of 2020. It had a number of defects, and at the time I ran out of solder and as I was waiting for new batch to arrive from China, somehow I've lost interest in the project, so it...
I updated my instruction list using different addressing modes and the new ALU functions. I am over by 57 Instructions. Going to have to do some prioritizing. I can't beleive they didn't even use all 256 Instructions on the 6502 and...
The original design uses an 8-bit data path. So it either works in the relatively slow 'PIO' mode, or wastes half the card data.A CF card can also present itself as a memory-mapped device, showing 1K of 16-bit words at a time.I think the CPU may be able...
Build PDP-8 Assembler Tool Assembler macro8x.c generates binary (DEC bin) files from PDP-8 Assembly Language filesNotes from macro8x.c source code This program has been built and successfully executed on: Linux (80486 CPU) using gcc RS/6000...
There is a CPU load monitor in the bottom right of the main screen of the VST host. It doesn’t show the overall CPU load like Windows Task Manager, but the actual system load for updating VST's and processing the audio buffers. The idea is to measure...
I wrestled today with two of the remaining instructions, LDCR and STCR, but before explaining them, I did plug in the CPU to my EP994A project (TI-99/4A clone), basically replacing the external TMS99105 interface - and synthesis did pass!!!!!! Wow! I...
It's been a while since my last update. During the time I haven't had that much time to put into the project. However, there is some nice progress:I have fully assembled two boards and they work. As can be seen from the picture above, one extra wire...
I've completed the schematic for the CPU portion of the design. It's a pretty big design - I'll post it here shortly. There's 21 chips just for the CPU. And just placing them on a PCB, it's about half the size of a standard piece of...
While waiting for my boards to show up today, I was reading the front page and saw this project replicating the 74181 in low level gates:https://hackaday.io/project/25596-mega-one-8-oneI also saw a note that the 74181 is no longer in production which...
Bus connection ribbon cable leads to TWO strange processors. One TS68008 which is a weird 32bit CPU with only an 8 bit interface. The second is an Intel 8051 CPU. The random 32 bit processor is strange.I have to wonder if this is not actually...