4-bit CPU (TD4 once again)

Description

TD4 is a 4-bit CPU built around 74HC283 full-adder (which I don't have and will replace with "discrete logic" adder) described in Japanese book "CPU no tsukurikata". That's not the first time this CPU is built here on HaD (see https://hackaday.io/project/8442-ttl-based-4-bit-cpu , that's actually how I found this book in first place).

Details

TD4 by itself is very primitive architecture - it can't even add it's registers together! There is only 16 bytes for program code and no RAM. Of course, it's easy to understand, but for something serious (think OS) that's absolutely not enough!

So, the plan:

Add RAM
Add switchable ROM banks
...
Software!

But, there are a few tricky moments.

First and foremost - I want to maintain backward compatibility with existing programs for TD4. It's not very hard, but gives a restriction to work with:

I can't change existing opcodes (there are 12 out of 16 now)

This means I can only use 4 additional instructions to implement all the features I want.

Currently, those 4 instruction are distributed like this:

LD Imm - load from RAM to register B
ST Imm - store to RAM from register B
SWM Imm - switch RAM (memory) bank
SWI Imm - switch ROM (instruction) bank

RISCy, isn't it?

Also, there is an age-old workaround - it's possible to hook up additional hardware to the I/O bus and control it using IN and OUT instructions. I consider this as a way to add some interedting functionality, like external ALU or even UART (communications!).

Another moment is jumps between ROM banks. I'm still not sure about the implementation details, so I skip this for a while.

Project Logs

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TD4 DevKit Reorganisation Log
Alexander Nekhaev • 05/06/2020 at 08:36 • 0 comments
Done:
- Assembler
- Disassembler
- Emulator
- stdlib
- stdpextlib
- "New project" script
In development:
- Preprocessor
We are stil alive!
Alexander Nekhaev • 04/14/2020 at 23:26 • 1 comment
Hi everyone! We have been absent for a while, but it doesn’t mean we haven’t been working on our project. Due to several reasons our engineer Fedor will return to his work on ardware in late October and I am still working on software. Right now I work on SDK improvements. In several weeks git repository will be updated and the Development Kit program will be divided into several independent ones:
- Preprocessor
- Assembler
- Disassembler
- Emulator
Next, standard library of assembler macros will be reorganized and partially rewritten. Also we are working on tiny OS for loading programs on two-core machines from external device. Unfortunately we refuse our .NET Assembler v3.0 and new SDK is further development of C-based assembler.

Some new utilities will be added.

Next step for software part is programming languages support. First of all C and Go compilers (looks like Go compiler will appear earlier). Talking about C compiler I mean LLVM back-end for TD4. Go compiler will be based on SSA library.

In Assembler v3.0 we introduced TD4E8 device without explanations. The difference between TD4 and TD4E8 is length of Imm which is 1 byte in new core. It means that amount of RAM now can be enlarged up to 8192 bytes.

Several ideas about future improvements:
- Improved emulator with modeling different machine configurations.
- SystemVerilog machine generator.
That’s all for now. Stay tuned and stay healty.
Assembler 3.0
Alexander Nekhaev • 08/25/2019 at 10:28 • 0 comments

Assembler 3.0 is mostly ready but some bugs still present. May be downloaded from repo. Attention: this version is written in C# so you will need .NET 4.7. It's available both on Windows, macOS and Linux.
SystemVerilog sources added
Alexander Nekhaev • 06/15/2019 at 12:58 • 0 comments

SystemVerilog source code of vanilla TD4 is now available on GitHub in main repo.
Early core scheme
Alexander Nekhaev • 03/05/2019 at 23:24 • 0 comments

TD4+ Core early version render (from KiCad).

Now in Minecraft!

Alexander Nekhaev • 02/01/2019 at 00:02 • 0 comments

Test program:

;;Standart test for TD4: output all numbers from 0 to 15
inc:
mov b, a
out b
mov a, b +1
jncl inc
hlt

Finally, an update!
Fedor Gruzdev • 10/18/2018 at 09:15 • 0 comments

After almost 2 weeks since projects' creation it's time to write a log, isn't it? I've got a few things to post.

First, now there's a link to Github repo with some code written by my friend with whom we started this. As he is more about software than hardware, he writes "SDK" (if you can call it this). For now, there are assembler/disassembler and emulator. This is enough to start writing programs (although you can do this using nothing but a sheet of paper but still).

Second, I finally assembed ROM PCB!

It's wired point-to-point using enameled wire. I saw this technique here on HaD (by the way, I hihgly reccomend visiting Elm's site, elm-chan.org, there's a lot of great stuff over there (check out the pictures!)). That's a time-consuming process, but the results look very nice (do they?). I've also made it swappable, so it's possible to develop program using this PCB and than make a smaller hard-wired diode-only version (true firmware BTW).
Next thing to do is to start assembling the main board, and the first part will be, of course, the IC9 replacement, discrete-logic ful adder!

View all 7 project logs

Discussions

powiadam.ci wrote 05/10/2024 at 11:51

Ok, this is mobile version? with screen, keyboard (or other way to input program and get output?

Power and meybe sound?

Are you sure? yes | no

juergen wrote 07/24/2023 at 17:16

This looks like a very good implementation.
We have a project called TPS Myco - a 4 bit processor system with all of the bells and whistles, but in software ...
and it might fit to expand this processor in the same direction.
We have 256 addresses using a 4 bit page register in addition to the program counter.
MyCo now runs on nano, microbit, RPI PICO and others,
but I always wanted an even limited version in chips..
And your approach looks quite close. 4 instructions could be implemented without decoding:
1n output nibble to output
2n delay execution by 16 different values
3n is JUMP Back in MyCo, but could be a JUMP
xn to be defined.

There is a downoloadable simulator - adaptable to the different implementations.

There is even an online version of TPS/MyCo with assembler at
https://wkla.no-ip.biz/ArduinoWiki/doku.php?id=en:arduino:arduinosps:tpsass:mnemonics

and there are 3 books about it on amazon already.

One of them describes it and you can just use pen and paper
- no hardware required to "run" the 40 examples. All fully described in the book
https://www.amazon.co.uk/Workbook-Executing-Processor-Execute-Hardware/dp/B08MN15NMQ/ref=sr_1_25?qid=1690218282&refinements=p_27%3AJuergen+Pintaske&s=books&sr=1-25

The other 2 books are here and show the different hardware implementations
https://www.amazon.co.uk/Learning-Programming-MyCo-Juergen-Pintaske/dp/B095GCZQY9/ref=sr_1_24?qid=1690218282&refinements=p_27%3AJuergen+Pintaske&s=books&sr=1-24

https://www.amazon.co.uk/Programming-Myco-TPS-simulate-independent/dp/1731232535/ref=sr_1_31?qid=1690218282&refinements=p_27%3AJuergen+Pintaske&s=books&sr=1-31

I am looking forward to more of your design.

Are you sure? yes | no

agp.cooper wrote 10/10/2018 at 11:55

The TD4 is perhaps my favourate CPU. Look forward to seeing your version.

Are you sure? yes | no

Dave's Dev Lab wrote 10/09/2018 at 20:01

looking forward to seeing some log entries on this! specially the 283 build!

Are you sure? yes | no

4-bit CPU (TD4 once again)

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TD4 DevKit Reorganisation Log

We are stil alive!

Assembler 3.0

SystemVerilog sources added

Early core scheme

Now in Minecraft!

Finally, an update!

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