UPDATE 13 Jul 19: An unchecked dimensional drawing is available in the project images for generating other EDA package footprints. Would be great if someone can check this drawing, either against the existing kicad/eagle footprints or building in another EDA, sending to PCB fab and confirming connection with the SOIC clip.

UPDATE 17 Jun 19: The Github repo now includes an Eagle version! Please test and check it works.

UPDATE 14 Jun 19: The Github repo readme.md now has suggested pad mapping for a variety of interfaces, thanks to @Jens Hauke .