Close
0%
0%

SPI addressable FPGA-based 7-segment display

Verilog-based project that exposes a 6-digit seven segment display that can be addressed over a spi bus.

Similar projects worth following
0 followers
  • Description
  • Details
  • Files 0
  • Components 0
  • Logs 0
  • Instructions 0
  • Discussion 0
- Charlieplex'd 6 digit display for efficient pin use.
- Board includes a simple hex inverter with schmitt trigger to help with higher speed refresh rates.
- Each segment individually addressable.

Enjoy this project?

Share

Discussions

Similar Projects

Does this project spark your interest?

Become a member to follow this project and never miss any updates