Shared Memory Interconnect for RC2014

Description

This is designed to act as a bridge between two RC2014 systems. Each of them is connected to one side of an IDT7130 dual port memory. A 74HCT138 on each side does the address decoding with a little help from a 74HCT11. Other than the decode there is basically no glue required. Even the interrupt mailbox is managed directly by the IDT7130 with each side having a doorbell memory location that causes a remote interrupt on write and is cleared by a local read.

This came from the coprocessor card and trying to squash things onto it. The RC2014 concept started out as one board one task so the obvious way to extend this was to chain motherboards. In this form factor you can fairly easily join two boards together (or three one each end) but a larger cluster would need some other form factors - long cards or maybe card pairs with bus drivers and cable.

Details

The board is fairly simple. The IDT7130 does all the work. The only decoding needed is to generate an I/O select on each side. This is done by the 74HCT138 and 74HCT11 allowing a choice of addresses of the format 1X1XX1NN, which is a bit quirky but happened to suit the bits I had. (X selectable by jumper NN select the bank of bytes)

Rather than memory map it the memory lives in 16bit I/O space with the low 2 low bits selecting one of four banks, and the upper byte acting as the low byte of the address to the memory. This isn't much slower than memory access in most cases and for bulk transfers inir and otir are full speed but end up reversing the bytes (B counts down so the 256 bytes are written backwards, but also read backwards so it cancels out)

The prototype tested M1 wrongly but a small wire bodge fixes that (and it turns out that M1 can be ignored in this case anyway).

Currently I am testing out the interface functionality piece by piece.

Longer term I'm hoping to move all the serial I/O, terminal editing and other annoying low speed CPU I/O to a second Z80 and support it under Fuzix as a smart I/O processor and also maybe as an offload second processor for running application code.

*** Do not build the version here, contact me if you want the fixes. At some point when I've got a new version tidied up I will update.

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