One-instruction TTL Computer

A breadboard-able computer which uses only a single instruction - MOVE

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This project is my attempt at making a computer which has only one instruction - the move instruction. Specifically, to move data from one location to another location. Those locations can be either registers or RAM or other special functions. This will be my submission for a neat small breadboard computer built by hand.The specific type of computer is called a Transport Triggered Architecture, but the triggering will be very simple. It works by moving data from one location to another. Every function has a memory location. To perform that function, you only need to move data to those memory locations. For example, to perform an ADD, just move bytes to the two ADD memory location, and the result will show up in the third memory location on the next clock. So the programs will only be a series of source and destination addresses.

Project status:

I have a working version of the architecture simulated in VHDL. It is synthesizable, and I have downloaded it to an Artix-7 development board - the Digilent Cmod. I have a few simple programs running with a UART interface. I have a bootloader/monitor running so I can load programs over the UART.  I've written a simple assembler to generate machine code I can send to the bootloader.   I've finished a schematic and layout for making a PCB.

Primary project goals:

  1. Implements only one instruction - move
  2. Can be built using a minimal number of simple DIP components (74xx TTL circuitry).
  3. All components are active. No obsolete or hard-to-find components. All components in stock at popular distributors.
  4. Useful - it needs to be able to run programs in a short amount of time.

Secondary project goals:

  1. Useful input mechanism. I expect a set of DIP switches for the input, but I'd prefer something more useful like a UART port or maybe a keyboard.
  2. Useful output mechanism. I could do a simple LED numeric display, but I'd prefer something more useful like a UART or at least a 4x20 character display. Perhaps I'd even do a video memory with a separate display.
  3. Easy and natural loading of programs. I'd prefer not to have a roundabout way to load programs into memory. Perhaps even use the above UART to send programs.
  4. Easily expandable for more memory. I'd like to be able to load very large programs.
  5. Write/adapt a compiler/assembler. I'd like to be able to take existing programs and compile them to run on the computer. This would probably be the last thing I do considering the complexity.

PCB Assembly Plan:

  1. Clock circuit with single-step mode and Reset
  2. Control state machine with AND/NOT gates and control LEDs
  3. Program counter Low and High with Memory Address Buffers and address LEDs
  4. Control Decoding
  5. Instruction ROM and data bus LEDs
  6. Source Hold Register
  7. Src/Dst Hi/Lo registers with data buffers
  8. Program counter Temp register and data buffers
  9. ALU A
  10. ALU '171 chips
  11. ALU result reg
  12. AEB/Carry FFs/buffers
  13. Src/Dst decoders and pointer address registers
  14. UART
  15. RAM

Memory Map 16.xlsx

Memory Map for the rev A schematic

sheet - 16.90 kB - 11/08/2017 at 13:04



Schematic of the PCB rev A

Adobe Portable Document Format - 1.57 MB - 11/08/2017 at 13:04



Clock circuit schematic

Adobe Portable Document Format - 119.50 kB - 06/16/2017 at 17:28


  • 1 × Texas Instruments PC16550D UART interface chip
  • 2 × Texas Instruments SN54LS181 4-Bit ALU
  • 4 × Texas Instruments SN54ACT245 8-bit bus transceiver with 3-state outputs
  • 2 × Texas Instruments SN74ALS867A 8-bit counter
  • 9 × Texas Instruments SN54ALS996 8-bit Register with readback and tri-state outputs

View all 7 components

  • So far so good

    Justin Davisa day ago 0 comments

    Got the power up and running.  The clock is on, but forgot to order a couple chips.  I did not go through my BOM closely enough.  So I'm ordering some today and hopefully they will be here soon.  In the meantime I've put on other time consuming parts like all my bypass capacitors and surface mount resistors.  They need to go on first anyway so I don't melt my sockets.

  • PCBs are in!

    Justin Davis2 days ago 0 comments

    Now for some soldering...

  • 'LS181

    Justin Davis3 days ago 0 comments

    While waiting for my boards to show up today, I was reading the front page and saw this project replicating the 74181 in low level gates:

    I also saw a note that the 74181 is no longer in production which raised a red flag for me.  I'm not sure why, but I never checked this - I always thought it was still in active production.  And so that makes me fail one of my objectives - to use only active production parts.  That's kind of disappointing, and I'm not sure why it never occurred to me.

    At some point I may start a new project for another CPU, and I will take this into account.  I really like this CPU design that spins it's own ALU which doubles as the video rendering output:

    I will probably have to do something similar.  But I'm not sure what the next CPU project for me will be.  I'll finish this one first.  But I have learned a lot, and I'll know a little better next time what is reasonably available.

  • PCBs shipped!

    Justin Davis11/16/2017 at 21:03 0 comments

    PCBs are shipping from EasyEDA and will arrive probably Monday.  I have also received all components.  I have also updated my FPGA design to match the PCB, so I should be able to run the same software on both platforms.  This will hopefully help me to debug any issues with the PCB.  I have my assembly procedure listed on the project details page, and I plan to test as I go to make sure each part works as expected before I build the next part.

    I also have my EEPROM programmer code all working.  So I can generate an Intel HEX file to download to the EEPROMs for each of my three EEPROMs in the design.  ALL SET TO BUILD!

  • Schematic uploaded

    Justin Davis11/08/2017 at 13:08 0 comments

    I forgot to upload the schematic for the PCB, but it's on here now.  It's an 8-page PDF to make it easy to read.  I could upload the design files if anyone is interested.  I also updated the memory map spreadsheet.

  • PCB ordered

    Justin Davis11/07/2017 at 19:13 0 comments

    I finally have ordered the PCB.  I've dragged my feet long enough, but they are paid for.  Probably be 2-3 weeks.  $60 plus $30 for shipping.  I added a bunch of LED indicators for when each module is active.  So when I step through the program I can see which chip is enabled.  I had quite a bit of board space to use up.  Hopefully I don't have too many mistakes (there's gotta be at least one in there).  Now I'll have actual hardware to show off (besides an FPGA).

  • Do it right

    Justin Davis11/06/2017 at 13:51 0 comments

    I put some time into seeing if I could get away with not putting current-limiting resistors on my LEDs, and I realized I could not.  My hope is I will get everything right with this board the first time, so I need to play it safe.  It makes my design look not quite as good, but that's ok.  I originally was going to use some surface mount resistors on the bottom side of the board to keep everything looking clean, but that's a lot of annoying soldering.  So I switched to a few resistor arrays.  

    They block some of the silkscreen, but it's not too bad.  I'll be looking down on it from directly overhead, and I'll know what it says.  I also labelled each important TTL chip just to make it look a little better and it may help with debugging.  I'm still considering putting more LEDs on here - maybe one for each chip when it's enabled.

    My inspiration for a good-looking board is the transistor-level 6502 project:

    Mine will not be as good as this one, but it shows how much pleasant aesthetics can do.

  • Control simulation

    Justin Davis10/30/2017 at 12:58 0 comments

    I am never comfortable sending out a PCB without simulating first.  I decided I had to simulate a few components which I had not.  The control chip was one and it's a good thing I did.  I found I had a combinational loop that oscillated.  Spent a while, but got that fixed without adding more chips.

    I also noticed in Ben Eater's videos that he drives a full bank of LEDs without current limiting resistors.  I figured I'd just do it.  And then the good engineer in me decided I need to double check it.  TTL does have an internal pull-up resistor, so it's possible to do it.  I measured the draw is 32mA and the datasheet maximum is 24mA.  I think I should probably test to failure - it might be at room temperature it can handle more.  Or I just put resistors on all 30+ LEDs which takes a lot more board space.

    I also discovered some clock glitches while testing.  My clock looks like it bounces on the falling edge, and I only caught it when stepping my shift register one clock at a time - it moved twice for every push.  I still have the old wired-OR logic hooked up, so I need to put the TTL OR in place to see if that's the problem.  More work before ordering PCB...

  • Blinkenlights!

    Justin Davis10/17/2017 at 16:31 0 comments

    I've added some LEDs so I can easily check the status of my board.  Now I can stop the clock, and step through the code while checking the data and address bus.  And I have a few more for the control logic state machine since it takes 6 clock cycles to execute one instruction.  I've also updated my 3D models to make it look a little nicer.

    Other than more silkscreen to make it pretty, I'm not sure what else is needed.  I'm still wondering if I should check some of these individual chips to verify they actually work like I'm expecting them.  Sometimes these old datasheets are not verbose in describing the operation of the chips.

  • PCB Layout first pass done

    Justin Davis10/13/2017 at 17:06 0 comments

    This board is a real bastard to layout.  I can only imagine how much it would have taken if I did it on a solderless breadboard.  Give me an FPGA any day.

    It's far from done, but everything is routed.  I still would like to add some LEDs just for some blinkenlights and debug.  And I need to add some silkscreen lettering to make it look really nice.  But these dimensions are 243x155mm.  EasyEDA says that's just under $60 plus shipping.  The real question is: what mistakes are lurking in there?

View all 78 project logs

Enjoy this project?



agp.cooper wrote 07/13/2017 at 15:27 point

Hi Justin,
Step back and relook at what a TTA is:
The machine cycles are:
Fetch SRC (address)
Fetch Data from [SCR]
Fetch DST (address)
Deposit Data to [DST]
This is what the timing diagram of the control signal looks like for the above machine cycle:

Sorry there is no load immediate but your assembler can store a constant for you to simulate a load immediate.
For indirect addressing (pointer to pointer moves, you will need these at some point), you will need self modifying code. 
That is for another time.
If your happy with the above the decoder logic is four chips including the clock.

  Are you sure? yes | no

Justin Davis wrote 07/13/2017 at 15:46 point

I can see one different in our design strategies.  I've been using the same clock for all my components, but then using the enable lines to control when I want them to do something.  You send each component it's own clock only when you want it to do something.  I've found a lot of TTL components do not have enables, so this makes a lot of sense.

  Are you sure? yes | no

agp.cooper wrote 07/13/2017 at 08:38 point

Hi Justin,

After 56 logs and frustrated by the load instruction do you want some help?


  Are you sure? yes | no

Justin Davis wrote 07/13/2017 at 11:48 point

I'm always open to advice.  The load instruction only became a problem when I decided to combine the source and destination buses into one.  It removed like 6 chips, but had to add two back.  So it's not a huge deal - just optimizing the design.

  Are you sure? yes | no

Andrew Starr wrote 04/28/2017 at 00:39 point

Very interesting! TTA has a certain austere simplicity that appeals....

  Are you sure? yes | no

agp.cooper wrote 04/25/2017 at 08:43 point

Hi Justin,

Have a look my Weird CPU it is a true move only CPU build with TTL:

It is a lot more primitive than what you are proposing.

Regards AlanX

  Are you sure? yes | no

Justin Davis wrote 04/25/2017 at 21:53 point

That looks great! And gives me some ideas for my own project.

  Are you sure? yes | no

Justin Davis wrote 04/22/2017 at 11:27 point

well that takes the wind out of my sails a bit.  I may have to review my goals based on these projects to keep mine unique

  Are you sure? yes | no

Yann Guidon / YGDES wrote 04/22/2017 at 13:36 point

no, just continue in your own way, you can only make something unique and discover new ideas if you don't look too much at other things :-)

  Are you sure? yes | no

Justin Davis wrote 04/22/2017 at 17:29 point

Ya, looking over that project and a few others, I still think my direction is unique. I think the one posted today is not a true one-instruction since it decodes the instruction into 4 different functions even taking a different number of clock cycles for each instruction. The others handle branches differently from how I'm planning on doing it. But they did have some good ideas.

  Are you sure? yes | no

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