This project is an open source Game Boy® compatible console Verilog RTL implementation. This project was my course project for the CMPEN 275 at Penn State back in 2017.
Original Goals for the CMPEN 275 course project
This project aims to recreate the whole Game Boy gaming system on an FPGA development board, with the ability to play commercial game like The Legend of Zelda with no major glitches.
To be specific, it should be able to run the unmodified Game Boy machine code, produce gray-scale graphics and output to an external monitor, produce the sound and output to the 3.5mm jack on the FPGA board, and accept user input to control the game. Other functionalities like serial communication and IR communication are currently not part of this project.
main system architecture is designed as follows (outdated):
There are three major parts needs to be implemented: the Game Boy CPU (8-bit CISC Processor, Intel 8080 like), the PPU (or GPU), the Sound unit. Several interfacing modules are needed to support the IO capability provided by the FPGA development board. Game ROM would be stored in on-board NOR flash, and RAM would be implemented with on-chip Block RAM.
Able to run Is That a Demo in Your Pocket with sound. See demo video! (Please turn down the volume, I found the signal from the FPGA is too hot for my recording device).
Pokemon Yellow and The Legend of Zelda: Link's Awakening DX are also tested to work with DualShock 2 support ( I should have picked a Nintendo(R) controller instead of Sony(R) one... But that's what I have. ).
After finishing the presentation for the course project, I started refactoring the code, starting from the CPU. I have also built a verilated simulator for it so it could be easily debugged on PC.
Currently the CPU is mostly cycle accurate based on various test ROMs. However the PPU is not. It is capable of running many games already.