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Kortex-S Processor

Bit serialized ARM Cortex Processor

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Description
Details
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Discussion 3

Description

Bit serial implementation of ARM CPU. Very slow, very small. Goal is that it can fit into VERY small FPGA.

Details

What if

we could schrink the Cortex-M0 core to fit into the smallest target silicon available?

We could then take standard GCC and compile code that runs in CHIP made by YOU!

Smaller than grain of sand, priced at 1 USD.

Nah, this is not possible !?

GOAL

Optimized bit-serial implementation of Cortex-M0 ISA
Resource usage
1. LUT4 <= 500
2. Flip-Flop <= 500
3. block RAM primitives < 4 (not counting program and data memories)
4. clocks per instruction < 128

The resource usage should be less than 50% of Lattice HX1K or XO2-1200 FPGA

Project Logs

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I found the sources...
Antti Lukats • 08/22/2015 at 20:12 • 0 comments

searching on HDD sometimes completes in finite time with results.. so the sources are found. The processor is not yet usable but can still be used as starting point.
pushed to github...

View project log

Discussions

Yann Guidon / YGDES wrote 08/23/2015 at 17:23

Why not call it KortekS ? Or Core-Tech-S ? :-)

Are you sure? yes | no

Antti Lukats wrote 08/23/2015 at 17:38

Calculated risk. Sensing the borders when C&D Letter comes. Should that happen, then fun begins..

Are you sure? yes | no

Yann Guidon / YGDES wrote 08/23/2015 at 17:41

but a pun is funnier than a lawyer ;-)

Are you sure? yes | no

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