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Bipolar XOR gate with only 2 transistors

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Yann Guidon / YGDESYann Guidon / YGDES 07/29/2018 at 15:4924 Comments

I sometimes find a small circuit with 3 resistors and 2 transistors that performs the eXclusive OR operation.

These two interlocked transistors use a very unusual structure, which requires the least theoretical number of switching elements, but it depends on a trick : the input impedances matter a lot and the circuit depends on a "hard" 0 level, because the circuit behaves almost like a "pass" element...

Thus, the question : is it the best method ? What about the switching speed or the capacitances ?

XOR is pretty important in CPUs because many mechanisms rely on it, for example ALUs. Does the gain in parts count affect the performance ? Apparently, it's pretty close to ideal because it's touted as a solution in Direct Coupled Transistor Transistor Logic:

Another version has only one transistor but 4 diodes :

Another question is : can this scheme (no amplification, just relying on the input's strength) be extended to other logic or sequential functions ?


The XOR gate has a much wider range of implementations in MOS and CMOS. You can find circuits using 4, 6, 8, 9, 10 or 12 transistors, again with varied strengths for the inputs and the output. For example, pass-transistor logic (transmission gates) makes it pretty simple :

Each pass element is a pair of complementary transistors, so this gate uses 2 NMOS and 2 PMOS. Add as many if you want to isolate the outputs with inverters...

Oh and don't forget another inverter at the output. This is why you'll find various transistor counts. Unless the designer wants to decompose the function into elementary boolean functions, and the size explodes, depending on how you break it up:

(also missing : picture with MUX2 and an inverted input)

This decomposition leads to the "classic" CMOS XOR gate:

which gains weight again when the inputs are buffered and inverted :

XOR has a reputation of a "slow and large gate" for this reason and that's why I investigate smarter topologies and their compromises.

Another version is also pretty nice :

This is interesting for my #Yet Another (Discrete) Clock because it is almost suitable for MOSFETs. The B input must double the transistors because of the inherent diodes but it's "only" 3×BS170 and 3×BS250. In this case, the B input actually works as a multiplexer or transmission gate... Which means it might not be suited for ultra high speed.

Even fewer parts with this 3T XOR :

In this case, only 1×BS170 and 3×BS250  are required. It's still not ideal because the BS250 is more expensive than the BS170 but I don't see how to permute the polarities without requiring more inverters... Furthermore, there seems to be a conflict with one of the input combinations : B=1 forces the output to 0, but if A=0 then the input B (which is =1) is forced to 0 by itself... The solution is another PFET controlled by A, in series with the grounding NFET.


Another source https://waset.org/publications/1588/a-high-speed-8-transistor-full-adder-design-using-novel-3-transistor-xor-gates explains in great detail why the short circuit is not such a big deal for ICs : they tune the width/ratio of certain transistors to minimize the unwanted current. This trades space for power consumption.

M1 has a 1/1 ratio, almost a square, wih minimal size, hence highest resistance, while M3 has a high ratio to overcome the pull-down from M1. For very high-speed CMOS circuits, where power is dominated by switching (and leakage for the newest processes) this short current can be considered "negligible".


Another interesting compromise uses only 2 of each type:

But the "upper pass trick" on input A might still need doubling of the P-MOSFET to cancel the parasitic body diodes. This could be cheaper if XNOR was made instead, so 2 PFETs are tied to Vcc in series, and the NFETs are used as pass elements.


ICs use even more variations on these ideas:

This odd one seems to interlock the leftmost transistors, followed by a NAND and finally an inverter:

An enhanced 9T XOR:

Even more combinations with pass transistors :

From https://waset.org/publications/1588/a-high-speed-8-transistor-full-adder-design-using-novel-3-transistor-xor-gates:

But I have not seen such variety for bipolar circuits.


ECL can use some creativity as well but these gates require many transistors anyway so it's not as interesting.

I have however wondered how to modify the differential amplifier to perform this operation...


I still can't find an answer about the bipolar case but I could easily adapt the interlocked system to MOSFET, in a bid to avoid P-MOSFETs. Naturally, this gives :

A rough simulation shows that there is a conflict through the parasitic body diode when the inputs are opposite.

One cheap way to avoid this case is with the insertion of diodes in series, to prevent one input from shorting into the other :

or for the purists : cancel the body diodes with back-to-back N-MOSFETs :

It would work at a lower supply voltage but the speed would be 2x slower because the FETs in series double the ON resistance...


spudfishScott uses 5 NMOS for his XOR at https://hackaday.io/project/162814-the-spikeputor/log/157607-building-blocks-2-multiplexors-and-flip-flops:

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Discussions

Tony Robinson wrote 02/16/2019 at 10:51 point

Thanks so much for this page.   I have worked on this a bit and written it up https://hackaday.io/project/19386-the-blinking-computer/log/159454-3-input-xor-in-4t-2r

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Yann Guidon / YGDES wrote 02/16/2019 at 16:27 point

If you can do one XOR, you can do two ;-)

The "interlocked BJT" needs a clean path to 0V so I'm not sure that chaining two such structures is efficient, the voltage swings might be uselessly large ?

@matseng  seems to have examined this :-D

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K.C. Lee wrote 08/02/2018 at 14:35 point

Could do this in 2 optoisolators, but it'll be really really slow like a few microseconds or even more.  :P

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Yann Guidon / YGDES wrote 08/02/2018 at 14:42 point

muahahahaha :-)

and with relays : only one ;-)

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K.C. Lee wrote 08/02/2018 at 16:02 point

The ones I have comes with built-in freewheeling diode and therefore polarized.

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Yann Guidon / YGDES wrote 08/02/2018 at 17:06 point

*sigh*

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K.C. Lee wrote 08/02/2018 at 21:06 point

BTW you might have missed my comment on ECL Xor using a diff. amplifier below - 3 days ago

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Yann Guidon / YGDES wrote 08/02/2018 at 21:10 point

Maybe, as notifications sometimes get lost in the mail... I'll look.

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Justin Davis wrote 08/02/2018 at 12:51 point

Another neat XOR: the one-transistor XOR gate.  I've built this in hardware and it works well, but there are some quirks. 

 https://www.circuitlab.com/circuit/q5y7c5/xor-using-diodes/

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Yann Guidon / YGDES wrote 08/02/2018 at 14:43 point

I've seen this in an analog circuit and I was puzzled at first... But it's worth a mention !

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Julian wrote 07/30/2018 at 21:51 point

Of course this interesting thing about ECL is that inverters are essentially free, which brings an (A&~B)|(B&~A) style XOR implementation down to being only slightly more complex than the traditional TTL version... that said, I'm convinced there must be a sneaky way to implement it using balanced inputs into a differential amplifier and detecting whether or not they're equal...

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Yann Guidon / YGDES wrote 07/30/2018 at 22:26 point

Yes, there MUST be a way.

Wait, what if I looked at actual ECL circuits ? :-P


The one I know is made of a MUX2, with 2 different driving levels, but I suspect it's not the only possible topology :-D

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K.C. Lee wrote 07/31/2018 at 00:50 point

See figure 1 in https://www.pulseresearchlab.com/pages/necl-pecl-faqs 

>Q1 and Q2 are normally referred to as the differential switch. In the steady state, either Q1 or Q2 is on but not both, and the output logic state is determined by the voltage difference between the bases of Q1 and Q2. If Vb1 – Vb2 > 200 mV, Q1 will be turned on and Q2 turned off, and vice versa.

What if you feed the non-inverting signal of the two XOR operands into the True & Complement inputs of the differential receiver and tie the output for Q1 and Q2 together - wire-Or the output ?  My brains can't run a spice simulation.

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Yann Guidon / YGDES wrote 08/02/2018 at 21:17 point

@K.C. Lee  I've had the similar thoughts, to replace the voltage reference with another input. But I doubt it's enough... I must miss a few elements... It'd be better to check the Motorola books :-)

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K.C. Lee wrote 08/02/2018 at 21:27 point

@Yann Guidon / YGDES  You might be able to get it down to 3 transistors by joining the collectors of Q1 and Q2 and only using of the Q3/Q4.  Don't know for sure until a spice simulation.

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roelh wrote 08/15/2018 at 20:34 point

Using balanced inputs to an analog circuit, producing the XOR....  This is a double balanced mixer, known from RF engineering. An example is the https://en.wikipedia.org/wiki/Gilbert_cell .

Since analog systems are balanced around zero, logic 0 is for instance +1volt and logic 1 is -1 volt (In practice, lower voltages might be used).

The balanced mixer multiplies the two input signals (btw, these inputs are in many cases differential). So:

+1 *  +1  --> +1

+1  *  -1  --> -1

-1  *  -1  --> +1

You see that the output is only  logic 1 (-1V) if the inputs are different. So thats XOR !

You will find that the Gilbert cell uses a transistor circuit that looks very much like digital transistor circuits.

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BigEd wrote 07/30/2018 at 12:22 point

You can certainly use the two-transistor (plus pull-up) case in NMOS but you do need to watch your logic levels. See for example section 5 here:

http://pastraiser.com/technology/nmos/basicnmosgates.html

I'd like to be able to point to such a case on the 6502, but I can't. There is a mux-based one though:

http://visual6502.org/wiki/index.php?title=6502_increment_PC_control

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Yann Guidon / YGDES wrote 07/30/2018 at 12:29 point

Damn, this XOR thing can never be exhausted :-P

Thanks for the links !

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BigEd wrote 08/06/2018 at 07:15 point

The Z80 has an interesting XOR gate - and Ken Shirriff links to a couple of others too. See here: http://www.righto.com/2013/09/understanding-z-80-processor-one-gate.html

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Yann Guidon / YGDES wrote 07/30/2018 at 12:35 point

5a is indeed used, then ! that's interesting to know :-D

What a crazy logic gate zoo :-P

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Dylan Brophy wrote 07/29/2018 at 17:07 point

That is really cool!  Glad I read it.

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Yann Guidon / YGDES wrote 07/29/2018 at 17:20 point

I'm glad my explorations and inquiries help other TTLers :-D

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Blair Vidakovich wrote 07/29/2018 at 15:52 point

wow, very very interesting!!

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Yann Guidon / YGDES wrote 07/29/2018 at 16:02 point

"it ain't but a scratch"...

I did only a few image searches. And I'm puzzled

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