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21326 Results for "8-bit cpu"

  • about Maix Bit

  • Before starting the program, let's do a little research on the hardware.Official information about Maix Bit can be found here.https://wiki.sipeed.com/soft/maixpy/en/develop_kit_board/maix_bit.htmlhttps://dl.sipeed.com/shareURL/MAIX/HDK/Sipeed-Maix-BitThe...
  • Practice Runs

  • I've never built a PC myself before, so I made it a point to practice installing components first. I don't have the CPU, GPU, RAM and the SSD yet, but I've done a little dry run, trying to install the CPU cooler and the power supply on the motherboard...
  • Implementing the SIMPL Machine.

  • The previous log The SIMPL Machine, looked at how the J1 Forth CPU simulation could be used as the basis of a cpu targeted to execute the SIMPL language. Here are some notes regarding the implementation on the Teensy 4.0 A switch-case structure...
  • CPU Board

  • Last but not least, the CPU Board that holds the MC14500 ICU, together with a 8-Bit Input and 8-Bit Output IC. Instead of the MC14599 Input / Output chip, I use the MC14099BCP instead - or it's still available equivalent, the CD4099B, that is still sold...
  • Fixing bit 17, more properlyish

  • I had to undo the last change to the ALU, because it broke things.The ALU, and also the right-shifting mechanism, need to work on full 18-bit words with the sign bit in bit 17, to accommodate a one-bit overflow of intermediate results during multiplication....
  • One Bit Block Diagram

  • One Bit Block Diagram Here is a block diagram of the one bit CPU I want to design: What I am doing different here is using the previously duplicated Input and Output addresses as separate Input and Output address. This gives 256 possible Inputs and 256...
  • 16-bit Instructions

  • The redesign continued to ECU section. The changes are fairly significant, so much so that the breadboard build needs to start over. It was almost back to the drawing board, but the CPU section remains fairly intact. The result is another reduction in...
  • 16-bit register space implemented

  • I have updated the VHDL code to implement the change to a single 16-bit address space which includes the register space and the RAM/ROM space.  It seems to be working ok.  I'm rewriting the bootloader for this new architecture.  I'm still...
  • State Machine and instruction types

  • When I was coming up with new Register Transfer Scheme,  and in general while rethinking the design approach for this CPU, I realised that the explicit state machine will be the way to go. At the time I thought it would consist of quite a few of...
  • All Your ISA Belong to Me!

  • Before I began the layout of the DDL4-CPU, I came up with an initial Instruction Set Architecture (ISA) for the design. It went through several revisions as I was designing the boards and refined the components. Here at the last minute as I am...
  • A Demonstration Program for a One Bit CPU

  • A Demonstration Program for a One Bit CPU I was thinking about a suitable demonstration program for a one bit CPU. My design has 4 inputs, two memory bits and 5 outputs. Long time ago a friend had three 4PDT switches and two LEDs wired up to count the...
  • KCP53000 CPU Is Now FPGA Proven!

  • I'm happy to report that I got the KCP53000 CPU and GPIA combination to actually blink an LED on the Nexys-2 FPGA development board!The CPU is clocked at 25MHz; when executing the following sequence of instructions:ledblnk: srli x3, x1, 24 ; 5 cycles...
  • Tower of CPU

  • Bending 24 wires and cutting them to the right lengths was easy using a template that I made in Eagle . 40 pin CPU socket with cut and soldered address&data busses I'll handle the remaining connections later, for now I'm happy to just get most of the...