As part of my Spikeputor project, I decided to use an Apple ][ for much of the I/O for retroputing flair, so we created an SPI controller card using 74 series TTL chips. Starting with this design for an SD interface card for Z-80 microprocessors, we modified it to work with the Apple's I/O scheme and upgraded the design. Features include:
- Four independently addressable SPI channels
- Automatically sends or reads a full byte at a time
- Use Apple's on-board clocks (2 MHz or 7MHz), or use an external clock
- Polling to determine transaction completion - no NOP's required!
- Blinkenlight mounted to the back of the controller card
Bytes are read or written using the Apple ]['s built in Peripheral Card I/O memory locations ($C080 - $C0FF). This card uses four memory locations $C0n0 - $C0n3, where n = $8 + peripheral slot number.
$C0n1 - Chip Select or Monitor: Writing a value to this location asserts the SPI ~CS line (active low) associated with each bit of the low order nybble written. Thus, to select SPI addresses 0 and 2, you would write $x5 to $C0n1. The high order nybble is ignored. Reading this memory location gives the current state of each ~SS line in the low order nybble. The high order bit is set high after the current transaction is completed, facilitating a simple read/BPL loop to wait for the data to be sent.
$C0n2 - Data Read/Write: Writing a value to this location latches in the byte to be sent when the next SPI transaction is started. Read this location after the transaction is complete to pull in the next byte of data from the peripheral.
$C0n3 - Chip Select Reset - Writing any value to this location will clear all the chip select signals. This is equivalent to writing a $00 to $C0n1
$C0n0 - Start SPI transaction. Writing any value to this location starts the SPI transaction to send the 8 bits in the output latch and to receive 8 bits from the peripheral into the input latch. The process is handled by hardware. One needs only to poll $C0n1 to determine when the transaction is complete.