Toward A More Rational Silkscreen

Today’s complex PCBs are being packed with a boatload of tiny components and are designed to run at ever-increasing speeds. So it certainly comes as no surprise to hear that silkscreen legends are fairly low on the designer’s priorities for consideration. However, the silkscreen’s function—that of aiding the manufacturer and engineer to locate components on the board—remains important.But just how important is it that all components be labeled individually, especially on boards so densely packed? With automated PCBA processes and the widespread use of electronic documentation, certain tradeoffs can now be made, where individual component identification is sacrificed for other types of identifiers. So in the spirit of endeavoring to design the best silkscreen possible, I will review the three types of silkscreen technologies and then advocate a more rational approach to today’s silkscreened boards.Component densities, along with package miniaturization, have become the main culprits in driving technology forward in both the fabrication and assembly processes. This is nowhere more evident than in the major advances in the fabrication realm in which High Density Interconnects (HDI), e.g., blind and buried vias, are now commonplace on most designs. And while certainly not as impressive as the move toward HDI, advances have also been made in how non-conductive ink is applied to create the silkscreen legend.

The board lettering that we call the “silkscreen” originally derived its name from the process of using a stencil to apply ink to the finished raw PCB, in much the same way that lettering or a graphic design is applied to T-shirts. Although this method is still used, new and improved processes are used today that significantly increase both throughput and legibility. Depending on the specific fabrication vendor and the specific make-up (text height and text-pad clearance) of the silkscreen input, one of three methodologies is used to apply the ink to the board:

Manual screen printing: This is the original silkscreening process, in which epoxy ink is pushed through a nylon screen stencil onto the laminate, which is then baked to cure. It is the least precise method of applying legend to a PCB.

Liquid Photo Imaging (LPI): A liquid photoimageable epoxy is coated onto the laminate, exposed with UV light through artwork, developed, and then baked to cure. This process is much the same as the soldermask process earlier in the board’s manufacture, but using (usually) white material instead of the (usual) green color of the soldermask.

Direct Legend Printing (DLP): This method is most analogous to the familiar process of printing documents on paper. Acrylic ink is applied onto the raw PCB directly from CAD data using a very accurate, high-end inkjet printer. As the ink is printed, it is instantly cured with UV light.

Chart 1, below, shows the various pros and cons of these three methods, along with DFM considerations.

From the standpoint of being able to reduce the text size and clearance to component pads and still be legible, the DLP process certainly gives the designer a better shot at packing in more component reference designators and other markings than the other two processes. The two roadblocks for the designer are availability and applicability. Not all fabricators have DLP printers, and for some applications the acrylic ink is not a viable option due to out-gassing (e.g., for space applications) or for PCBs with silver finishes. The question that has to be asked is: How small can you go and still be able to read the text with the naked eye? I would venture to say that unless we are all willing to use magnifiers, the DLP technology with .020″ minimum text sizes is pretty much at the limit of what can be sensibly achieved as useful. As a point of comparison, most printed material uses a font size of between 8- and 12-pt. (1 pt. = 1/72″). Silkscreen text at .050″ high is less than 4pt. type, while...

PCB Design Perfection Starts in the CAD Library

Drafting elements in a CAD library part are not “Standardized” for specific values or sizes but there are recommendations that are coming out in the IPC-2610 series that include schematics, PCB assembly(PCBA) and fabrication. Documentation includes component outline and polarity markings for silkscreen and assembly. This article focuses on silkscreen and assembly Reference Designators.

 Every reference designator (Ref Des) originates in the schematic diagram and is transferred to the PCB layout via the netlist. They also appear in the Bill of Material that is exported from the schematic and passed to the assembly shop. The rules for reference designator assignment are established by the IPC-2512 publication. However the Ref Des size, font, CAD layer and placement location are left up to the EE engineer and/or PCB designer.

 Every CAD library part should have 2 distinct reference designators, one for the silkscreen and one for the assembly drawing. Both designators, in every CAD library part, are normally located in the center of the component body. The silkscreen reference designator is relocated outside the component body after the part placement is completed and approved by the design review panel. If via fanout and trace routing cause part placement nudging then it’s best to wait until that process is completed or duplication of effort will come into play. Also, if via hole sizes exceed 0.4 mm and they are not tented then it’s best to avoid placing the silkscreen reference designators over the via hole, as the ink will drop into the hole making the reference designator indistinguishable and eliminate the purpose of having the reference designator to begin with. If you are using large via hole sizes it’s best to wait until the PCB design passes the engineering routing review panel. Via sizes smaller than 0.4mm can be tented (covered) with solder mask and the placement of silkscreen designators can go directly on the via.

 The silkscreen reference designator height sizes are –

• 1.0 mm – Minimum
• 1.5 mm – LP Calculator Default
• 2.0 mm – Nominal
• 2.5 mm – Maximum

 The reference designator text line width is normally 10% of the height for good clarity and to prevent the characters from bleeding or blobbing together. The 0.15 mm height “Default” is what the LP Calculator uses but users can change the global setting values to any value or measurement system.

 The assembly reference designators are different in the fact that they never get relocated outside the component body outline. Assembly reference designator height sizes are –

• 1.5 mm – Default
• 1.2 mm – 0.5 mm for miniature components

 Here are some chip component assembly ref des height sizes that scale down according to the body size  –

• 4520 (EIA 1808) = 1.5 mm
• 3216 (EIA 1206) = 1.2 mm
• 2013 (EIA 0805) = 1.0 mm
• 1608 (EIA 0603) = 0.7 mm
• 1005 (EIA 0402) = 0.5 mm
• 0603 (EIA 0201) – 0.5 mm

 Note: All assembly body outlines are 1:1 scale of the physical component with the exception of all micro-miniature parts smaller than 1.6 mm length. Parts less than 1.6 mm length are EIA 0402 and 0201. These 2 parts assembly outline has to be enlarged so that the 0.5 mm assembly ref des fits cleanly inside it.

Also, most land patterns (CAD library parts) have the Lands (Pads) put on the assembly layer. This is true for all parts that are large enough to accommodate both the component leads and the assembly ref des without interfering with each other. When the component leads interfere with the assembly ref des, the component leads on the assembly layer are removed from the padstack. This includes all chip components, crystals, molded body parts and grid array parts with bottom only leads.

See Figure 1 for a sample of a typical silkscreen with the reference designators relocated outside the part.

 See Figure 2 for a sample of a typical assembly drawing with the reference designators inside the part, exactly where they...

Designing for Optimization of Printed Circuit Board Assembly (PCBA)

I have often been told about engineers who do not read, much less follow, directions when assembling an item. Regrettably, I am no exception to this observation. There have been numerous occasions when I have emptied the contents of a newly acquired product onto the floor and immediately begun trying to piece it together, oblivious to the included instructions. Simply following directions would have spared me from the embarrassment that followed.
In stark contrast to my usual method of assembling home products, contract manufacturers (CMs) follow a well-defined set of steps for board fabrication and PCB assembly. PCB assembly or PCBA, the process of securing your components to the board, employs a sequential procedure that includes board preparation, component placement, component attachment and board finishing. This process, at its best, is characterized by collaboration and the incorporation of CM techniques and equipment capabilities into your design decisions. Let’s see how your board design and component choices can optimize your CM’s PCBA of your design.

PCBA Optimized Board Design

Design for manufacturing (DFM) is the utilization of guidelines to determine specifications for the layout of your board based on your CM’s equipment capabilities. DFM includes specifications that target board fabrication, PCB assembly or both. The particular design decisions you make to improve the assembly of your PCB can be categorized as design for assembly (DFA). Just as DFM is intended to ensure manufacturability and improve the efficiency of PCB manufacturing, the objective of DFA is to assure PCB assembly is as smooth as possible. The effectiveness of your application of DFA determines the level of PCB assembly optimization.

How to Design Your Boards for PCBA Optimization

PCBA optimization is primarily determined by and positively correlated with the design choices made for your board parameters, as shown below.

To improve the optimization of your PCBA, follow the recommendations in the last column as much as possible.
lthough the impact of component selection on PCBA is often undervalued, your component choice can significantly affect the assembly process. For example, utilizing the component lifecycle to minimize the selection of components drifting towards obsolescence avoids delays and minimizes the chances of PCB redesign prior to assembly. Your choice of component package type can reduce PCBA steps when either through-hole or surface mount devices (SMDs) are used (and not both). Additionally, using double-sided assembly can allow for DFA specifications to be relaxed. Along with these decisions, your PCBA may be optimized by following the recommendations below:

How to select components for PCBA optimization

• Verify component availability.

Obsolete or soon to be obsolete components will extend the PCBA process.

• Use either through-hole or SMDs.

Through-hole components and SMDs are mounted differently and therefore require different steps. By using one or the other, the number of PCBA steps can be reduced.

• Avoid components that tend to take on moisture, if possible. (If components are required, be sure to identify them for your CM).

Components that take on water require baking before they can be soldered, which takes additional time. Failing to bake them may result in an explosion.

• Select components that can withstand PCBA temperature increases.

The soldering process usually adds 80° C or more to the board temperature. Temperature sensitive components may not be able to withstand this increase in heat.

• If using components that are sensitive to X-ray radiation, make sure to identify for your CM.

X-ray inspections are used for a deeper level of internal observation. However, some components may suffer radiation damage during exposure.
The PCBA process is best optimized by forging a symbiotic relationship with your CM to ensure that your design leverages the expertise and capabilities...