OK its all working fine so I just need to upgrade the micro to get another SAI channel add XMOS and gigabyte ethernet.. what could possibly go wrong ??
re-writing the firmware with new pins and DMA channels etc is done and its starting to come to life.
Bluetooth works and so does the 1" screen on i2c2 for debugging. The DMA channels initialize and the player pushes audio samples through the DMA channel etc.
Then I probe the FS / TDM line on the DAC and I can see audio on all 8 channels of the TDM line. FS is not changing according to the WAV file the player code is playing.
The player finds the sample rate in the WAV header and should change the SAI port clock according to the sample rate of the file. The TDM channel number should also change ( usually to 2 for normal stereo ) The Channels switch on in RECORD mode individually but no audio getting through to DAC yet. I still need to check SPI port to analogue preamps is actually working although the current draw goes up when i switch on preamp 1 so looks like it is!
I'm running the STM32H7 with external HSE TCXO at 25mhz as I did STM32 F7
The player should change the SAI peripheral clock like this and it worked on stm32f7..
__weak HAL_StatusTypeDef BSP_AUDIO_OUT_ClockConfig(SAI_HandleTypeDef *hsai, uint32_t AudioFreq, void *Params){
RCC_PeriphCLKInitTypeDef rcc_ex_clk_init_struct;
// HAL_RCCEx_GetPeriphCLKConfig(&rcc_ex_clk_init_struct); // BEN do i need to run this ?
HAL_StatusTypeDef ret = HAL_OK;
/* Set the PLL configuration according to the audio frequency */if((AudioFreq == AUDIO_FREQUENCY_11K) || (AudioFreq == AUDIO_FREQUENCY_22K) || (AudioFreq == AUDIO_FREQUENCY_44K))
{
/* SAI clock config *//* Configure PLLSAI prescalers *//* PLL2_VCO Input = HSE_VALUE/PLL2M = 1 Mhz *//* PLL2_VCO Output = PLL2_VCO Input * PLL2N = 429 Mhz *//* SAI_CLK_x = PLL2_VCO Output/PLL2P = 429/38 = 11.267 Mhz */
rcc_ex_clk_init_struct.PeriphClockSelection = RCC_PERIPHCLK_SAI23;
rcc_ex_clk_init_struct.Sai23ClockSelection = RCC_SAI23CLKSOURCE_PLL2; // SAI23 clock selection !!! SAI2 shares peroph clock with SAI3?
rcc_ex_clk_init_struct.PLL2.PLL2P = 38; // PLL2P: Division factor for system clock. Min_Data = 2 and Max_Data = 128
rcc_ex_clk_init_struct.PLL2.PLL2Q = 1;
rcc_ex_clk_init_struct.PLL2.PLL2R = 1;
rcc_ex_clk_init_struct.PLL2.PLL2N = 429; // PLL2N: Multiplication factor for PLL2 VCO output clock. Min_Data = 4 and Max_Data = 512
rcc_ex_clk_init_struct.PLL2.PLL2FRACN = 0;
rcc_ex_clk_init_struct.PLL2.PLL2M = 25;
if (HAL_RCCEx_PeriphCLKConfig(&rcc_ex_clk_init_struct) != HAL_OK)
{
ret = HAL_ERROR;
}
}
else/* AUDIO_FREQUENCY_8K, AUDIO_FREQUENCY_16K, AUDIO_FREQUENCY_48K, AUDIO_FREQUENCY_96K, AUDIO_FREQUENCY_192K */
{
/* SAI clock config *//* Configure PLLSAI prescalers *//* PLL2_VCO Input = HSE_VALUE/PLL2M = 1 Mhz *//* PLL2_VCO Output = PLL2_VCO Input * PLL2N = 344 Mhz *//* SAI_CLK_x = PLL2_VCO Output/PLL2P = 344/7 = 49.333 Mhz */
rcc_ex_clk_init_struct.PeriphClockSelection = RCC_PERIPHCLK_SAI2;
rcc_ex_clk_init_struct.Sai23ClockSelection = RCC_SAI2CLKSOURCE_PLL2; // // SAI23 clock selection !!!
rcc_ex_clk_init_struct.PLL2.PLL2P = 7; // PLL2P: Division factor for system clock. Min_Data = 2 and Max_Data = 128
rcc_ex_clk_init_struct.PLL2.PLL2Q = 1; // PLL2Q: Division factor for peripheral clocks. Min_Data = 1 and Max_Data = 128
rcc_ex_clk_init_struct.PLL2.PLL2R = 1; // PLL2R: Division factor for peripheral clocks. Min_Data = 1 and Max_Data = 128
rcc_ex_clk_init_struct.PLL2.PLL2N = 344; // PLL2N: Multiplication factor for PLL2 VCO output clock. Min_Data = 4 and Max_Data = 512
rcc_ex_clk_init_struct.PLL2.PLL2FRACN = 0;//PLL2FRACN: Specifies Fractional Part Of The Multiplication Factor for PLL2 VCO It should be a value between 0 and 8191
rcc_ex_clk_init_struct.PLL2.PLL2M = 25; // PLL2M: Division factor for PLL2 VCO input clock. Min_Data = 1 and Max_Data = 63if (HAL_RCCEx_PeriphCLKConfig(&rcc_ex_clk_init_struct) != HAL_OK)
{
ret = HAL_ERROR;
}
}
return ret; // should return HAL_OK
}
The clock RCC_PERIPHCLK_SAI2 = RCC_PERIPHCLK_SAI23
shared peripheral clock between SAI 2 and 3 ! !!!
I'm slowly getting there, but I'm wishing I included some easy hook onto probe pins now between on TDM lines between MICRO and ADAU1467 and perhaps TDM between XMOS and DSP ! of course that's easier said than done on a 4 layer board with so many signal lines.
The next job is to step through the code and check the TDM active slot number is being adjusted as it was in STM32F7.
the new board powered up OK and the debugger talks to the new STM32H7.
The H7 has more SAI ports
I'm using the 3rd port for the TI audio code for LTC timecode IO
The 4th port doesn't really configure in cubeMX as I've maxed out all the DMA channels !
my main mistake so far i can see is I don't have the XMOS I2C as slave connected up to the an i2C master on the STM32H7 in the way i was going to. somehow slipped through the net! the only use i could think for it was to shut down the XMOS chip for power saving anyway when not using AVB gigabit audio and/or aes3 and/or usbC pc mac connectivity. I find it hard to believe that little XMOS will cope with doing all three AES3 / USBC / AVB simultaneously but it's wired up like that in case :)
I made a little 2.54mm 20pin -> 1.27mm 20pin connector convertor for the XMOS debugger to save board space.
I'm still waiting for the TI codec IC / gigabit PY chip / RF connectors and USB C connector.
I'm pretty excited to be able to use the interface with a DAW over AVB or USB C.
In some ways it will be easier to test the analogue stuff without pulling the mico SD card out and inserting into the computer all the time !
One thing I should have included maybe is another USB socket to mount the micro SD cards from PC/MAC but i don't think that will be to hard to add in future revisions.
I need to also see if it's possible to add an SSD controller to an STM32H7. I imagine your moving towards having to run an operating system for that which i'm not really up for ! but if i can mount an SSD like the micoSD with a simple exFAT capable library in C then why not.
OK, lots of firmware work ahead after I update the analogue board and click together with the board to board connector :)
I will hopefully be able to reuse most of my code from stm32f7 but this time i'm using generated code from cubeMX and going to try adding my code in the user sections.. might be a trap ! herd horror stories of code being over written by cubeMX in user sections on forums so will have to make a lot of backups !
I just soldered up my new 3.3V 2A module and i'm running a test under load.
l2V supplyoutputthermo1.850A load and 3V out
the board temp is about 50c - 55c after an hour. ambient room temp is about 26c
the TPSM84029 4.5V - 28V input
ADM7172 fixed 3.3V output ( should be ! )
The dummy load is always a bit off so I hooked up my bench multimeter and noticed the voltage creeps down from 3.3 to 3v from around 1.25A load.
I'll never draw more current that around 1.2A and at startup only with the STM32H7 ADAU1467 and XMOS chip. but i'm interested in what can cause the voltage drop at the higher current draw?
at 1.25A 3.3V output 12Vin the board is at 40C
I really need to get an ESR meter I think to check the ESR of the input output capacitors.
Can anyone else see anything else wrong with my design ?
should I have more than 300mV headroom for the low noise LDO AD7172 ?
Could it even be at higher current loads multimeter test wires need to be shorter?
either way this module is way more stable than my last effort and totally usable in the design for now :)
new digi board with board to board connector to analogue board
B2B connector has enough high for RF shield
XMOS chip added for AVB,USB2 & AES3
AVB on gigabit ethernet
USB2 ( on usbC socket ) multichannel connectivity for osx and pc
AES3 IO switched into analouge mini xlr inputs outputs ( 8 channel in 4 channel out ) switching happens on analogue board ( room for 16 channel AES3 expansion )
individual analouge preamp channel pwr switching(individual CS lines run to run to preamps)
codec IC for mini jack IO timecode or other possible uses.
battery backup for TXCO and ARM timecode
Upgraded STM32F7 to H7 for 3 SAI ports to include CODEC IO for timecode IO
RF modules for TC RX digital audio or Timecode or both ?
2ppm TXCO clock for Timecode IO on individual codec connected to ARM via SAI port
I tried to order an xilinx FPGA dev board and thought of implementing DANTE on that but it seams DANTE is more corporate development and big budget. Fair enough.
So now i'm adding an xcore-200 for AVB 1 gigabit ethernet audio IO.
I found the IC quite difficult to route and i'm not entirely convinsed I can get more than 8 channel in and 8 out over single TDM data lines. I only have 1 in and 1 out left on the ADAU1467 DSP.
but , 8 in 8 out and possible 16 in 16 out on ethernet is OK !!!!
I might be able to throw in some AES3 IO to from the same chip if I get good at using there IDE.
I'm hoping to be able to power off the XCORE-200 if no ethernet or AES3 is in use to for power saving. I think it will probebly use 1amp at 3.3v when all the channels are up !
Hers the Digi side of the new box with the panel off.
Its ABS plastic ( mock up only ! ) if everything fits in properly and I learn how to draw a CAD box ( currently learning the free software Design Spark by RS ) I will get an aluminium version of the same thing made. This case is not water proof so I need to learn how to make a channel for a rubber compression gasket I think.
The ADC DAC card 1 is at right angles now and there is plenty of room at the back although nothing holding it all in place at that side. I think the EMI shield could extend outward in the final design to be a kind of mounting bracket for PCB's to box! I might mount the 1" OLED somewhere on the box just for debugging.
The timecode IO is on massive BNC connectors. separate for in / out. This is mainly because there are so many annoying timecode cables these days that are impossible to repair in the field I though it better to keep that simple. The mini XLR are just part of the design trade off with size, there's just no way I will get another 8 connectors on there if I used full size XLR and i decided break out D socket to XLR's are annoying if your only using a few channels of audio.
I'm thinking there will be 16 channels of AES3 mini xlr on the rear side of the case since that's were the 2nd TDM IO port is on the digi board.
There should be enough room for 12v of lithium iron internal battery above the 1" OLED in this pic. I did put a 4 pin power hirose connector on the box since I'm not sure where it should go yet. maybe by the timecode sockets.
It reminds me of a little mac mini ! This is the analogue side, the big ugly 40pin IDE
cable will go ! its just bridging the ADC DAC IO and power. By luck they line up pretty well when the ADC DAC card is at 90 degrees. I just need some right angle double row headers and the card will just plug right in :)
I only have one preamp plugged in and I have only made 4 of the new deisgn so far!
I only have one in there mainly in case I dangle a oscilloscope crocodile connector and short some 48v phantom and blow all the cards ! I do cover the phantom power via's and anything exposed with tape or glue after learning why they call it phantom! Yep it happened to 4 cards a year or so ago !
Now there's 2 x line drivers in there and 1 headphone card. Its enough for most testing. I'll probebly put the programmer in the box and add a usb port to the case. Just easier than dangling an external programmer if I want to take the thing with me to the park and work on some code.
ben biles
