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The Rise and Fall of Pulses

A project in which I try to go faster and faster

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I have a few projects in mind that need either really short pulses, or pulses with really short rise and fall times, or both. There are a number of ways to create such pulses, from reed relays (!) to ECL logic and CML-output comparators to old-school unobtanium avalanche transistors and step-recovery diodes.

Generating fast pulses is one thing; measuring them is another. I think I'm going to have to boostrap some measurement equipment because I may have already exceeded the capabilities of a 1 GHz scope.

I'll see what I can do.

The details for this project are going to be in the build logs, each detailing one experiment on the way to ... well, to be honest, I'm not entirely sure yet.

  • Fun with Clip Lines

    Ted Yapo2 days ago 0 comments

    If you dig through enough schematics for old Tektronix sampling heads, you eventually come across "clip lines." The idea is to use a stub section of transmission line to shape fast pulses. To play around with the idea, I threw together a test using another 74AC04.

    The circuit uses three of the inverters in the package as an RC oscillator with the remaining three paralleled through resistors to create an approximately 50 ohm driver. Three gates can't really supply enough current for use like this - you need four - but it was good enough for a quick test.

    The clip line itself is a 20 cm section of RG58/U cable shorted at one end. When the output drivers go high, the line initially looks like a 50 ohm resistor (its characteristic impedance), and cuts the output amplitude by half, forming a divider with the 50 ohm output impedance. The edge of the pulse travels the length of the line, is reflected with inverted polarity by the shorted end, and returns to combine with the output. Since the reflected signal was inverted, it cancels with the driver voltage, leaving a zero output. So, the output pulse is only high for one round trip through the cable, creating a predictable, repeatable, and stable output pulse width.

    Here's how Tektronix used them in one of their samplers: the clip lines control width of the pulse created by the step recovery diode, D73. The whole thing looks awesomely simple.

    No Clip Line

    The output of the pulse generator without the clip line attached is a 5V square wave with 1.48 us (yes, microsecond) positive pulse width. The rise time measurement is inaccurate at this timebase setting. The voltage scale is also wrong, since I forgot to adjust for the 20x attenuator.

    Zooming in, we can see the edge is very fast, and there's some ringing at the top of the pulse.

    Now, with Clip Line

    Adding the section of transmission line to the circuit transforms the output waveform into a short pulse, in this case around 2.5 ns wide. I measured the section of RG-58U cable to be approximately 20 cm long. With a velocity factor of 0.66, this should be 1.01 ns one-way, creating a pulse width of 2.02 ns. That's close enough to the measured value to be convincing - after all, the pulse isn't particularly pretty, and I don't know exactly where the scope is measuring the width.

    The amplitude is also halved to 2.5 V (again, the attenuation setting on the scope was wrong).

    There is also a corresponding negative pulse at the falling edge of the input signal. The scope couldn't show both on the screen at once because they are too narrow relative to the spacing.

    There's some ringing at the end of the pulse, probably because my quick test circuit doesn't present a good 50 ohm output to match the Z0 of the cable. This causes reflections of the initial edge to bounce around until they finally decay.

    Conclusion

    Hey, this kinda works. Maybe I should really concentrate on getting a fast, clean step and let sections of transmission line form my pulses.

  • CMOS Differential Pulse Generator

    Ted Yapo3 days ago 0 comments

    So, I combined a few ideas from previous logs and prototyped a differential pulse generator with 74AC CMOS gates. The goal is to have a differential output with large swings for short pulses. I got it to 10V swings and around 1.6 ns pulses.

    There are two parts to the circuit: an edge-to-glitch converter and the XOR differential stage from previous logs. Both have capacitive trimmers for fine adjustment. I got smart and grounded the correct side of the trimmers this time, so they can be adjusted with a metal screwdriver without affecting the circuit.

    With some careful tuning of both trimmers, I ended up with the output shown below. Ch1 (green) is the output of the upper XOR, it swings from 5V down to 0 for the pulse. Ch2 (blue) is the lower XOR output; it swings from 0 up to 5V. The magenta/pink traces are math combinations of the two. The magenta trace is the sum of the two outputs - ideally, it should be a constant 2.5 V; any wiggles are errors in the two outputs. The pink trace is the difference between the two outputs - the differential signal. It's not a bad pulse, really. It is 1.6 ns wide, and has an amplitude of about 10V. With the 24 mA output capability of the 74AC gates, it should have no problem driving a diode sampling gate through relatively large resistors (perhaps a few hundred ohms).

    Note how a lot of the ringing on the upper and lower pulses have cancelled in the differential pulse. That's a neat side effect that I hadn't anticipated.

    This is probably OK for a first test, although I'd really like to be able to do this at least 3x faster. 74LVC1G gates might come close.

  • Some Edge Tests

    Ted Yapo4 days ago 3 comments

    I finally populated a couple of PCBs I designed about a month ago. These are simple Schmitt-trigger oscillators with 74xx1G04 inverter output buffers. I populated one with 74LCV1G devices and one with the faster SN74AUC1G to compare the edge rates - the results were surprising.

    The circuit is shown below. I didn't populate one of the inverters intended to drive a sync output. The output series resistor is 453 ohms, creating a 10x divider when used on a scope with 50-ohm input termination. An SMA-BNC adapter lets you connect the board right at the scope input with no intervening cable to slow the rise time.

    ADCMP606

    As a baseline, I re-measured my ADCMP606 version. This uses a CML-output comparator with typical datasheet rise times of 160 ps. On my 1 GHz scope, it measures 392 ps, which is more the scope than the pulse. For the rest of the measurements, I'll assume the ADCMP606 is actually creating pulses with 160 ps rise time, so the scope's rise time is sqrt(392^2 - 160^2) = 370 ps. This estimate is probably high based on some other clues, but I'm going to stick with it for now.

    The output here is 400 mVp-p (single-ended CML), and shows very little overshoot. The estimated slew rate is 2 V/ns.

    74LVC1G04 (@ 5V)

    I populated one PCB with 741GLVC parts. The rise time displayed on the scope is 485 ps. After correcting for the (estimated) scope's rise time, this becomes sqrt(485^2 - 370^2) = 314 ps. This sounds low and probably is, but is useful for comparison with the other devices. Also note the ringing after the edge. Although the rise time is longer, this is a 5 V pulse as opposed to the 400 mV from the CML part, so the slew rate is around 12 V/ns - 6x faster!

    Note that this trace appears faster because the timebase is different. The scope uses an amplitude histogram of the waveform to determine the 10% and 90% thresholds, and it can be thrown off by the overshoot. By expanding the timescale, you can include enough of the steady-state high output to stabilize the histogram and produce better measurements.

    SN74AUC1G04 (@3.3V)

    I pushed these parts to their max voltage for this test. The measured rise time is 552 ps, which might be as low as sqrt(552^2 - 370^2) = 410 ps. Either way, the rise time on the SN74AUC parts is slower than the 74LVC1G. This is surprising, because the AUC part is much faster than the LVC, with a 1.6 ns max Tpd (2.5 V) vs 3.1 ns (5 V). The output also shows less overshoot. These effects are probably due to the special output structure of the AUC gates, which is supposed to eliminate many of the reflection problems on high-speed boards. You can supposedly drive 15 cm traces without source termination resistors.

    For reference, the estimated slew rate is 6.4 V/ns, a little more than half that of the LVC part.

    74AUP1G04

    I have some 74AUP1G04's around somewhere - these are low-power devices with longer Tpd (4.2 ns max into 15 pF at 3.3V). I can't find them at the moment, but I have one PCB left for when I do. I'll update the log when (and if!) I can ever locate those parts.

    74AC04

    I still can't find the 74AUP1G04's, so I decided to try some DIP parts. I realized that I has never tested a 74AC gate right at the scope input before - there had always been some cable in between. So, this time, I built a pulser right next to a BNC male plug.

    This circuit is a 3-inverter RC oscillator followed by an inverter-as-buffer. I used a 430 ohm output resistor because I was too lazy to look for the 453's. It's a 9.6x probe :-)

    When measured this way, the 74AC04 shows a 568 ps rise time. This would be 431 ps correcting for the scope response as I did above. I had always measured something more like 1 ns when testing through cables. This really makes me want to investigate a little more about exactly what the difference is. Maybe I have an adapter so I can try interposing some different length (and type) cables between this board and the scope.

    74HC04

    While I was at it, I threw together...

    Read more »

  • XOR on the Bench

    Ted Yapo6 days ago 2 comments

    In the last log, I speculated about using a pair of XOR gates to get a complementary (differential) pair of outputs from CMOS logic. This brought up a lot of questions, and the best cure for that is some quality bench time. I threw a 74AC86 XOR package on some copper clad and tested it out.

    It's the same idea from the last log: use two XOR gates, one as an inverter, one as a pass-though, and hope that the skew between the two outputs is low.

    The output shows around 570 ps of skew. Compared to the 1 ns rise/fall times of the signals, this isn't really very good.

    I wasn't sure how much this skew was due to differences between the individual gates, or to the different delay when used as an inverter (as predicted by @salec ). To test this out, I swapped the gates around, and measured around 470 ps of skew. A little algebra convinced me that this means there's 50 ps difference between the two gates themselves, and around 520 ps difference due to using one of them as an inverter.

    520 ps skew on a signal with 1000 ps edges ain't great. But, in absolute terms, this is small enough to "tune away" with a potentiometer or other adjustable delay, as suggested by @Yann Guidon / YGDES.


    EDIT

    Sleep is over-rated. I tuned this thing instead. I added two 10 Ohm resistors and a 15-70 pF cap. With some careful adjustment, I reduced the skew to 2.6 ps! It's not very stable at that value, but it seems to stay in the single digits to teens. A skew this low is kind of meaningless when you consider that the difference in rise and fall times is around 70 ps. I think the conclusion is that you can, indeed, just tune this thing until it works.

    For completeness, here's the new circuit.


    The trimmer is difficult to adjust - the only tools I have that will fit in there are metal screwdrivers, and they add their own capacitance to the circuit. You have to over-compensate so that when the screwdriver is removed, the circuit ends up tuned. It takes a few tries. Maybe I need to print some alignment tools?

    The probes deserve a  mention, too - these are simply 453 Ohm resistors soldered on to the end of a length of RG174 cable. Combined with the scope's 50 Ohm terminators, they make 10:1 probes with a decent bandwidth, much better than commercial probes I can afford. To make these two, I just cut a cheap BNC cable in half - as close to exactly half as possible to maintain equal delays.


    EDIT 2019-01-19

    I read in "High Speed Digital Design: A Handbook of Black Magic" about using varactors to tune logic delays. I had a selection of 10 different types of varactors in the diode bin, and chose an NTE618 for a test - this is a device originally designed for AM tuners. It has a wide capacitance range 20-460 pF, although you need up to 15 V reverse bias to push it to low values. I put it in series with an 82 pF fixed cap, and biased it through a 10 K resistor and a voltage divider.

    It's the same idea as the trimmer cap version, but now electronically tunable.

    With the components used, the tuning range is around 310 ps. This is enough to fine-tune the delay if you can get it in the ballpark first. The varactor drifts with temperature, though, so some kind of automatic calibration that could periodically adjust it would be nice.

    This is probably overkill for the planned use, but an interesting experiment nonetheless.

  • What am I missing?

    Ted Yapo01/16/2019 at 12:42 11 comments

    So, I'd like to find a CMOS logic gate with complementary outputs - you know, like ECL, CML, LVDS, or any of those differential signaling families. It's not for a logic application; it's for driving a diode sampling gate with a truly differential pulse - transformers just aren't cutting it (story for another log!). I don't think such things exist, so I came up with this. Can I do better? What do you think?

    I'm hopeful that if I use two devices from the same gate package, I can get a small timing difference (skew) between the two outputs. I'm looking at the 74LVC2G86 right now, because I need the large voltage swings afforded by a 5V supply and the 32 mA drive.

    I had considered somehow using the Q/Qbar outputs of a d-flip-flop, but I think there are a few problems with that.

  • Stroboscopic Converters as Sampling Oscilloscopes

    Ted Yapo01/11/2019 at 21:54 0 comments

    I just prototyped a stroboscopic A/D converter. It works, and it appears that you could make a similar one with available parts that would function as a 10 GHz sampling oscilloscope. This is where it gets interesting, people.

    This version won't do anything near 10 GHz, but works as a proof-of-concept, and I was able to build it with parts I had on-hand. I love that kind of project.

    Stroboscopic Converters 101

    A stroboscopic converter looks a lot like a successive-approximation ADC (SAR ADC). If you consider just the DAC and lower comparator in the figure below, you can see the elements of a simple SAR ADC. Assume for the moment that we apply a DC voltage to the Ch1 input. We can read the value of that voltage by successively comparing it to different voltages output from the DAC. A naïve implementation would simply scan through all possible DAC output voltages, taking at most 2n tries for an n-bit DAC. You can do much better than this using a binary search over the DAC levels, of course, taking only n tries. SAR ADCs are cheap and accurate for low- to medium-speed ADCs, so are seen in many commercial offerings.

    We've made a voltmeter. Now we need to turn it into an oscilloscope.

    A closer look at the lower comparator reveals a latch-enable input (LE), allowing the voltage to be compared at a specific instant in time. To digitize an AC signal, a trigger pulse enables the lower comparator repeatedly at the same point in the waveform cycle. At this point, the motion of the input signal has been frozen, as if by a stroboscope, and the SAR conversion can proceed as normal. Once that particular data point has been digitized, the trigger point is moved slightly in time, and a new data point is captured. Doing this repeatedly results in a set of voltage measurements vs time, which is exactly what an oscilloscope does.

    The schematic is a bit simplified and differs from what I actually built. For example, I needed 74ACT parts, since the comparator output is TTL level, which can't drive 5V CMOS inputs. All I had were 74ACT14's, so those went in for the 74AC04.

    More importantly, a variable trigger delay is missing from the diagram. This part is critical to be able to reliably sample the input signal at specified points in time. In the prototype, the time scanning is faked by generating appropriate trigger points with arbitrary waveform generation software. For a real system, a variable delay line will need to be implemented. Luckily, such parts are made for very fine timing adjustments to critical clock and data lines. For around $10, you can obtain a digitally adjustable delay line with 10 ps steps (and an analog fine tuning input). The delays will need to be calibrated for use in a sampling scope, but that's an issue for another time. I'm working on a prototype adjustable delay board now.

    First Tests

    I haven't finished an adjustable delay line yet, so I used two outputs of an FL2k USB-VGA dongle with the osmo-fl2k software to generate both the sampling trigger pulses and a test sine-wave input. That's what the arbitrary waveform generator from the previous log was all about.

    I managed to get a decent first result, sampling a sine input every 67 ns.

    You can see where the successive approximation routine got stuck and produced a bogus conversion - clearly, there's a bug somewhere. It's not a bad first try, though. Now to go faster and faster and faster and...

    References

    This has been done before. A kickstarter from 2013 promised a 10 GHz sampling scope for $300, but didn't get funded. The clever folks over on eevblog eventually recognized this as a stroboscopic converter design, with an older version using ADCMP582 comparators (8 GHz input bandwidth). That design wasn't open-source, and appears to have been lost, so it makes sense to re-invent the (free) wheel in this case.

    Next Steps

    I'm still experimenting with a more traditional diode sampling gate. The difficulty is in generating the sampling current...

    Read more »

  • Tangent #0: Arbitrary Waveform Generator

    Ted Yapo01/02/2019 at 00:41 0 comments

    While considering my next move, I thought it would be useful to have a simple multi-channel arbitrary waveform generator. The first thing to come to mind was the FL2k USB-to-VGA dongle and osmo-fl2k software library. I put together a python module for defining and digitizing some interesting waveforms which can be output through the adapter. The example code in GitHub generates the following waveforms:

    There's no filtering on the output of the FL2k dongle (yet), so the waveforms look a little rough. There's some OK documentation of how to use the code on the GitHub page. As shown above, you can define sine waves, Gaussian edges and pulses with defined edge rates, and square-sided pulses. You can also define linear edges (ramps) and exponential (RC) edges. You can define the rise and fall times and the high and low measurement points (default 10% and 90%), as well as the edge threshold (default 50%).  The rise times and pulse widths measured on the scope are very close (modulo noise) to those defined in the code.

    You choose the sample rate, and the code allows you to preview the output.

    The outputs from the FL2k aren't very fast, in this case only using 100 MS/s (my laptop will do 150 MS/s maximum with this hardware). But, I think I need a source of some lower signals for initial testing before I move to shorter timescales.

  • Testing Five Scopes

    Ted Yapo01/01/2019 at 15:58 10 comments

    My adapters arrived in the mail, allowing me to connect the ADCMP606 pulse generator to scope inputs with no intervening cable, so I decided to test the scopes I had hanging around the lab. The difference between low-end and high-end scopes quickly became apparent. First up, the Tektronix TDS754D, hacked into a 1 GHz TDS784D. At full bandwidth, it shows a 395 ps rise time. I still don't know exactly how fast the pulse edge is, so this result is a little suspect.

    In all cases, I used Tektronix's recommended BW = 0.45/t formula for estimating the scope's bandwidth from rise time measurements. In this case, we get a bandwidth of 1.14 GHz. This is plausible for a 1 GHz scope.

    Next, I turned on the 250 MHz LPF. Note that the scope shows a decently Gaussian response, like you would expect from an actual 250 MHz scope - the results for the cheaper units below are vastly different. In this case, the rise time is 1.5 ns, implying a bandwidth of 300 MHz.

    Finally, I enabled the 20 MHz limiting filter and measured a 17.5 ns rise time, equating to a 26 MHz bandwidth using the 0.45 constant. Note that using the 0.35 constant recommend for older scopes, this equates to exactly 20 MHz. Also note the Gaussian-looking edges on the step: again, this is doing a good imitation of a slow scope, unlike the less expensive scopes explored below.

    Rigol DS2302A

    Next up is a Rigol "DS2302A" 300 MHz scope. It's actually a hacked 70 MHz DS2072A. At full bandwidth, the rise time comes in at 1.06 ns, which means a 424 MHz bandwidth.

    Turning on the 100 MHz filter, the rise time drops to 3.46 ns, and the estimated bandwidth is 101 MHz. Here, I've used the 0.35/t bandwidth approximation since it is valid for an RC response. The shape of this step is very interesting, kinda lousy, and representative of all three inexpensive scopes I tested. Notice how the step resembles an exponential RC ramp instead of a Gaussian step? Can you guess how the low-pass filter is implemented in this scope?


    Continuing with the 20 MHz filter on this scope, we get a 14.6 ns rise time and 24 MHz bandwidth, again using the 0.35 constant. The use of an RC filter as a bandwidth limiting element is even more apparent here.

    RIgol DS1104Z

    Another "upgraded" Rigol, this time from a DS1054Z to a 100 MHz DS1104Z. At full bandwidth, we measure a 2.7 ns rise time, and 130 MHz bandwidth (0.35/t). Note that the pulse already looks a little RC-ish. It makes you wonder about the anti-aliasing filter.

    Adding in the 20 MHz bandwidth limit brings on the full RC pulse shape. It also increases the rise time to 13.4 ns, and decreases the bandwidth to 26 MHz (0.35/t).

    OWON SDS7102

    Don't buy this scope. The Rigol DS1054Z is an infinitely better value. On the OWON I have, the rotary encoders have become almost unusable - half the time, they move backwards. The only reason I keep this scope around is because it works on batteries, so it's useful for poking around in the car without dragging an inverter into the garage.

    The SDS7102 is billed as a 100 MHz scope, although the 1.96 ns rise time implies more like 179 MHz (0.35/t). This may be the scope's only other redeeming feature.

    Turning on the 20 MHz limiter, we measure 14.5 ns, meaning 24 MHz (0.35/t). As with the Rigol's, this scope uses a very simple bandwidth limiting filter. You'd ideally see the same Gaussian-shape edge just with a longer rise time.

    Maybe nobody uses the bandwidth limit feature on their scope?

    GoldStar OS-9020G

    Last up, we have an analog scope, just for kicks. The OS-9020G boasts a 20 MHz bandwidth, and no automated measurement capability at all. I added the lines below, manually estimating a 12 ns rise time, which would imply a 37.5 MHz bandwidth using the 0.45 constant. This is certainly a scope... Read more »

  • Pulser with ADCMP606

    Ted Yapo12/27/2018 at 18:19 8 comments

    I figured for a first try, I'd use a $6 ADCMP606 CML-output comparator. It's not the fastest available, with leisurely 160 ps typical Tr/Tf, and 1.2 ns minimum pulse width. There are faster ones available, like the $70 HMC874, with 24 ps rise and 15 ps fall times and 60 ps minimum pulse width. I wanted to get some experience with these things before plunking down that much cash.

    I designed a quick circuit using a 74LVC1G14 Schmitt-trigger inverter as an oscillator at about 500 kHz. The oscillator drives a 74LVC1G04 as a buffer than then drives the + input of the ADCMP606 comparator.  The - input of the comparator is held at mid-supply with a bypassed voltage divider. The output is AC-coupled to an SMA connector. I made a mistake on the PCB and used the wrong footprint - it was supposed to be a PCB-mount male BNC so the board could be connected right to a 50-ohm terminated oscilloscope with no cable. More on this below.

    There's a jumper to select free-running or triggered pulses. With the jumper removed, two of the pins are the trigger input and ground. There's a USB connector for power, but I didn't populate it.

    There's no added hysteresis in the circuit - If I make another one, I'll probably add some, since there is a little oscillation on the falling edge - I suspect ground bounce.

    I tried to keep all the high-speed stuff small and near the connector in the PCB layout, using 0402 parts where it counts around the SC-70 comparator. I didn't have any large value 0402 capacitors, so the output pulses don't look square - the 10 nF cap and the 50-ohm impedance make a nice high-pass filter. When I get some, I'll fix it.

    So, how does it work? I measured 400 ps rise time with a 1 GHz scope. I did have a section of coax in between the pulser and the scope, which could be increasing transition times through dispersion - I have some adapters on order so I can connect it without any cable and see if the measurement changes.

    This measurement is also problematic because it's (probably) very close to the rise time of the scope itself. So, I may be measuring the scope more than the pulse.

    The bandwidth of the scope and its rise time are inversely related. Tektronix recommends using the equation:

    for modern real-time digital oscilloscopes (older analog scopes are better approximated with a constant of 0.35). Even though the scope (a modded TDS754D) is running in equivalent-time sampling mode at these speeds, it's an interesting data point. This equation would imply a 1.125 GHz bandwidth, which seems reasonable for a 1 GHz scope.  I had previously estimated the scope's 3 dB bandwidth at 1.05 GHz. So, the actual pulse edge could be considerably faster, maybe even approaching the typical 160 ps from the comparator's datasheet.

    I would be satisfied with this result except for one thing. The ebay seller from whom I bought the oscilloscope had posted an image showing a 284 ps rise time when measured with a 40 ps edge!

    You can estimate the rise time elongation of the scope by applying the formula:

    Using this, and assuming the 284 ps rise time is correct, the pulser would be creating 281 ps edges (sqrt(400^2 - 284^2)). That sounds plausible, too, but I have no way of proving it one way or the other at the moment.

    It's also possible I may have exhausted my measurement capability on the first shot. If so, it's time to bootstrap some way to measure even faster pulses.

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Yann Guidon / YGDES wrote 12/28/2018 at 07:21 point

Oh, I'm VERY interested :-D

  Are you sure? yes | no

Ted Yapo wrote 12/28/2018 at 18:49 point

Didn't you buy a Tek mainframe that can accept those really high-speed sampling plugins?

  Are you sure? yes | no

Yann Guidon / YGDES wrote 12/28/2018 at 21:00 point

are we really going that route ? :-P

I have no idea of the reference of a sampling module for the 11k series... and it would need a crazy sampling probe at an insane price :-/

I am currently trying to reach about 500MHz with new active probes that will arrive soon and this is already unchartered territory for me...

  Are you sure? yes | no

Ted Yapo wrote 12/28/2018 at 21:28 point

I have just resigned myself to measure everything with a 50-ohm input (at least for the moment). If I'm really worried, I'll add a 953-ohm resistor on the end of a piece of coax to make a 20x probe with 1k impedance. Any circuit that can't deal with that is weak ;-)

The 11800-scopes can accept an SD-30 sampler that goes to 40 GHz. Not sure which 11k you have...

http://w140.com/tekwiki/wiki/SD-30

The interface specs for these sampling heads are documented, which kind of makes me want to hack them onto the front of a cheap Rigol just for kicks.

  Are you sure? yes | no

Yann Guidon / YGDES wrote 12/29/2018 at 20:58 point

Go ahead, I'll keep watching
////Grabs popcorn

Oh BTW I have a 11302A, not sure if it accepts many things...

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Yann Guidon / YGDES wrote 12/29/2018 at 21:00 point

Yeah the connector at the back is clearly not compatible with my mainframe...

  Are you sure? yes | no

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