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3niti alpha

Ternary computer "3niti alpha" that I started to design in 2004

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Ternary is still in kind of "Science Fiction" state, but I'm working on getting it into "Real Science". I started to be interested in ternary (more precisely "balanced ternary" with 3 states -1,0,+1) in December 2004 and immediately designed a simple ternary 3-trit computer architecture that I called "3niti alpha" (so in the future it's gonna be "beta", "gamma", etc :) and in October 2008 I also designed control panel for it (see below). Later I did software emulation in Java (now obsolete) and then hardware emulation with help of 8-bit PIC microcontroller. It is too far from actual "true ternary" implementation yet, but I'm slowly moving to that direction and I'll be there eventually ;)

A little of ternary theory - we will use "balanced" one where our 3 values are -1, 0 and +1 (NOT 0,1,2). Atomic bit of ternary information usually called trit. And lets call 3 trits a triad. 1 trit could be in 3 states, 2 trits could be in 9 states (3^2) and 3 trits could be in 27 states (3^3). Triad may represent a number from -13 (9*(-1)+3*(-1)+1*(-1)) to +13 (9*(+1)+3*(+1)+1*(+1)), but how we should write this numbers in ternary form? -1-1-1 and +1+1+1 are not practical. So we came up with alphabetical labels for ternary values: +1 is labeled P (positive), 0 is labeled O (it's letter O, but we call it "neutral") and -1 is labeled N (negative), So -1-1-1 (number -13) could be written as NNN and +1+1+1 (number +14) could be written as PPP. Obviously 000 (number 0) is OOO :)


Now about 3niti alpha architecture (mostly designed in 2004). It has 3-trit data (27 possible values from -13 to +13), 9-trit address (to access up to 19683 cells) and 9 registers (coded by 2 trits that could be represented by numbers from -4 to +4):

N (-4): triad from memory addressed by DPn;
O (-3): triad from memory addressed by DPo;
P (-2): triad from memory addressed by DPp;
F (-1): flag register: RSF (Result Sign Flag), DPF (Data Pointer Flag), BCF (Borrow Carry Flag);
A (0): accumulator register;
B (+1): auxiliary register;
L (+2): lower triad of current DP register;
M (+3): middle triad of current DP register;
H (+4): higher triad of current DP register.


There are THREE 9-trit DP (data pointer) registers - DPn, DPo, DPp that are available through registers L/M/H when flag DPF has corresponding value (N, O, P respectively). Also there is 9-trit register PC (program counter) and this architecture doesn't have a stack, so no register SP.

Instruction set is 27 opcodes ($ means one triad in instruction parameters):

TernaryDecimalMnemonicDescription
NNN-13SANSave value from register A to N (memory cell with address DPn)
NNO-12SAOSave value from register A to O (memory cell with address DPo)
NNP-11SAPSave value from register A to P (memory cell with address DPp)
NON-10SAFSave value from register A to F
NOO-9SPCDSave value from PC (program counter) to current DP (data pointer)
NOP-8SABSave value from register A to B
NPN-7SALSave value from register A to L (lower triad of current data pointer)
NPO-6SAMSave value from register A to M (middle triad of current data pointer)
NPP-5SAHSave value from register A to H (higher triad of current data pointer)
ONN-4RLARotate register A to the left through flag BCF
ONO-3ADDAdd register A with B and flag BCF, save result to A and BCF, modify sign flag RSF
ONP-2RRARotate register A to the right through flag BCF
OON-1LAI $Load register A from immediate triad
OOO0ADI $Add register A with immediate triad and flag BCF, save result to A and BCF, modify sign flag RSF
OOP1OPA $Perform unary "tritwise" operation over A (function is defined by immediate triad), modify sign flag RSF
OPN2LDI $ $ $Load current DP (data pointer) by immediate 3 triads (higher triad, middle triad, lower triad)
OPO3JMP $ $ $Jump to address (copy to PC) set by immediate 3 triads (higher triad, middle triad, lower triad)
OPP4OPB $ $ $Perform binary "tritwise" operation over A and B, save result to A (function is defined by immediate 3 triads), modify sign flag RSF
PNN5LANLoad register A by value from N (memory cell with address DPn)
PNO6LAOLoad register A by value from O (memory cell with address DPo)
PNP7LAPLoad register A by value from P (memory cell with address DPp)
PON8LAFLoad register A by value from F
POO9LPCDLoad PC (program counter) by value from current DP (data pointer)
POP10LABLoad register A by value from B
PPN11LALLoad register A by value from L (lower triad of current data pointer)
PPO12LAMLoad register A by value from M (middle triad of current data pointer)
PPP13LAHLoad register A by value from H (higher triad of current data pointer)

Control panel for 3niti alpha (designed in 2008) consists of 2 rows:

Top horizontal row of 15 "ternary" red-green light indicators:

  • Lights...
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t1_test3.asm

Test 3 - 3niti alpha simulator with 1 paragraph of code and 1 paragraph of data (no use for external memory yet)

asm - 20.62 kB - 03/07/2017 at 01:15

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t1_test2.asm

Test 2 - simulate ternary clock

asm - 7.62 kB - 03/07/2017 at 01:11

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t1_test1.asm

Test 1 - test switches and lights

asm - 2.54 kB - 03/07/2017 at 01:11

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shaos-p16.inc

Useful macros for PIC16

inc - 1.02 kB - 03/07/2017 at 01:10

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nedo16v1t-eagle.zip

Board of "3niti alpha simu1" (simulator of ternary computer on PIC)

Zip Archive - 176.48 kB - 03/06/2017 at 06:10

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  • 1 × PIC16F870 Microprocessors, Microcontrollers, DSPs / ARM, RISC-Based Microcontrollers
  • 1 × socket DIP-28
  • 1 × tactile switch
  • 1 × 4-pin header
  • 1 × 20MHz crystal

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