So what will change ?
- Microcode is not used any more, instructions will be RISC
- Four new 16-bit data registers in hardware (now total 8 registers)
- The 8-bit ALU will change to 16-bit ALU
- All instructions need two cycles (fetch, execute)
The Kobold K2 will be faster, and its operation will be easier to explain.
The video system will stay mostly the same.
Finding the balance between low number of parts and high functionality is one of the key aspects of TTL CPU design (at least, for me it is). I want to keep the part count low, but not to the extreme as in #1 Square Inch TTL CPU. The CPU part of the computer should fit on a single PCB.
To keep the control system simple, every instruction should execute in a single cycle. If the ALU was kept 8 bits wide, that would mean 2 instructions for many 16-bit actions (as in the Z80 or 6502), and that would slow down 16-bit operations. Therefore, the ALU is now 16 bit wide. I don't want to use the 74181 ALU, so to keep part count reasonable, the ALU has only a few functions. The small number of functions also simplifies control.
The average performance per clockcycle is expected to be higher than that of a 6502 or Z80 and might come close to the performance of a 68000 in several situations. The performance is mainly due to the RISC strategy, fast access to 4 data registers and 4 address registers, and to having everything 16 bit wide.
It can also simulate the cpu. If you open the simulator, just press Run to start the prime-number-generation demo ! In this window, you can also open the Manual to see which instructions and addressing modes are available. And of course, you can try to program yourself....
A Raspberry Pi can connect to the Kobold computer. On the Pi, you can make the application for the Kobold with the online compiler, then download the result to the Pi and put it in the Flash program memory of the Kobold (with a Python script).
14. Instruction Map
15. PCB's ordered
19. Blinking LED !
All instructions are 16 bits long. Most MOV instructions can be executed conditionally.
Most instructions have two operands:
- An operand according to one of the 7 addressing modes
- A register operand (one of the 8 registers)
The register operand is in most cases also the destination.
Address register A1 is WP, the workspace pointer. It points to a memory section where 16 word-sized local variables can be addressed (available in almost every instruction)....Read more »