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Homebrew ternary computer

TRIADOR: The only ternary computer made for real in the past 50 years.

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Many claimed to build a ternary computer, however nobody (to the best of my knowledge) completed the project. TRIADOR project makes no empty promises!

In this project we are trying to build a very simple but functional 3-trit balanced ternary computer. The only building block allowed is a ternary multiplexer based on DG403 analog switches. 

 ══════════════════════════════════════════════════════════
        Description of the ternary computer TRIADOR
 ══════════════════════════════════════════════════════════
  General purpose
     registers
 trits 2 1 0  (a trit can take -1,0,+1 values)
      ┌─┬─┬─┐
    R1│ │ │ │ \
      ├─┼─┼─┤ |                              Program memory
    R2│ │ │ │ |                            trits 4 3 2 1 0
      ├─┼─┼─┤ |-- main set                      ┌─┬─┬─┬─┬─┐
    R3│ │ │ │ |   of registers           a  -364│ │ │ │ │ │
      ├─┼─┼─┤ |                          d      ├─┼─┼─┼─┼─┤
    R4│ │ │ │ /                          d  -363│ │ │ │ │ │
      ├─┼─┼─┤                            r      ├─┼─┼─┼─┼─┤
    R5│ │ │ │ \                          e  -362│ │ │ │ │ │
      ├─┼─┼─┤ |                          s      ├─┼─┼─┼─┼─┤
    R6│ │ │ │ |                          s      : : : : : :
      ├─┼─┼─┤ |                                 ├─┼─┼─┼─┼─┤
    R7│ │ │ │ |                              -1 │ │ │ │ │ │
      ├─┼─┼─┤ |                                 ├─┼─┼─┼─┼─┤
    R8│ │ │ │ |                               0 │ │ │ │ │ │
      ├─┼─┼─┤ |-- extra registers               ├─┼─┼─┼─┼─┤
    R9│ │ │ │ |                              +1 │ │ │ │ │ │
      ├─┼─┼─┤ |                                 ├─┼─┼─┼─┼─┤
   R10│ │ │ │ |                                 : : : : : :
      ├─┼─┼─┤ |                                 ├─┼─┼─┼─┼─┤
   R11│ │ │ │ |                             +363│ │ │ │ │ │
      ├─┼─┼─┤ |                                 ├─┼─┼─┼─┼─┤
   R12│ │ │ │ /                             +364│ │ │ │ │ │
      ├─┼─┼─┤                                   └─┴─┴─┴─┴─┘
   R13│ │ │ │ Special register,
      └─┴─┴─┘ specifies memory segment for JP ttt
      ┌─┬─┬─┬─┬─┬─┐
   PC │ │ │ │ │ │ │ program counter register (-364..+364)
      └─┴─┴─┴─┴─┴─┘
      ┌─┐
    C │ │ borrow/carry flag (+1 borrow, -1 carry)
      └─┘

  Every 3-trit register can take values from -13 to +13:

  t2*9 + t1*3 + t0

  where t0,t1,t2 - trits (-1,0,+1)

 ═══════════════════════════════════════════════════════════
                 TRIADOR instruction set
 ═══════════════════════════════════════════════════════════
  (for lisibility we use N,O,P instead of -1,0,+1)
  ┌───────┬────────┬───────────────────────────────────────┐
  │op code│mnemonic│ description                           │
  ├───────┼────────┼───────────────────────────────────────┤
  │ NNttt │ EX ttt │ extension commands (work in progress) │
  ├───────┼────────┼───────────────────────────────────────┤
  │ NOttt │ JP ttt │ unconditional jump to R13*27+ttt      │
  ├───────┼────────┼───────────────────────────────────────┤
  │ NPttt │ SK ttt │ conditional skips of the next command │
  ├───────┼────────┼───────────────────────────────────────┤
  │ ONttt │ OP ttt │ tritwise unary operation over R1      │
  ├───────┼────────┼───────────────────────────────────────┤
  │ OOttt │ RR ttt │ copying between registers             │
  ├───────┼────────┼───────────────────────────────────────┤
  │ OPttt │ R1 ttt │ write ttt to the register R1          │
  ├───────┼────────┼───────────────────────────────────────┤
  │ PNttt │ R2 ttt │ write ttt to the register R2          │
  ├───────┼────────┼───────────────────────────────────────┤
  │ POttt │ R3 ttt │ write ttt to the register R3          │
  ├───────┼────────┼───────────────────────────────────────┤
  │ PPttt │ R4 ttt │ write ttt to the register R4          │
  └───────┴────────┴───────────────────────────────────────┘

  Additional comments:
  - ttt means a 3-trit number with values
    from NNN (-13) to PPP (+13)

  - RR ttt instruction copies a register to/from R1 or performs
    an increment/decrement over R1
    OONNN — copy R1 to R13
    OONNO — copy R1 to R12
    OONNP — copy R1 to R11
    OONON — copy R1 to R10
    OONOO — copy R1 to R9
 OONOP...
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TRIADOR.TXT

Specification of ternary computer TRIADOR

plain - 7.88 kB - 12/17/2017 at 23:58

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  • 600 × dg403dy Switches and Multiplexers / Analog Switches and Multiplexers

  • Here how 600 dg403dy look like

    Dmitry V. Sokolov12/20/2017 at 06:22 0 comments

    Some of them have 1990 on the label :)

  • More on ternary memory (flip-flap-flops)

    Dmitry V. Sokolov12/19/2017 at 11:50 0 comments

    A flip-flap-flop can be made from two static memory cells wired in a master-slave configuration. Here is the schematics and accompagnying video:

    I use exactly this schematic in the program counter. The RAM is wired a bit differently, however the idea is the same. 

  • Balanced ternary DAC

    Dmitry V. Sokolov12/19/2017 at 11:27 0 comments

    I'd like to play pong on my computer and I plan to use an old scope in the X/Y mode for the screen. So I need a digital-to-analog converter. Naturally, resistor ladders come into mind, however R-2R would not work directly.

    Let us try to find resistor values. Current intensities are tied with the voltages in the following way:

    You can try the following code snippet in the sage calculator:

    var("R,R1,R2,R3,R4,R5,R6,V1,V2,V3")
    A=matrix([[0,0,1,-1,0,0],[0,1,0,1,-1,0],[1,0,0,0,1,-1],[0,0,R3,R4,R5,R6],[0,R2,0,0,R5,R6],[R1,0,0,0,0,R6]])
    b=matrix([[0],[0],[0],[V3],[V2],[V1]])
    I=(A.inverse()*b).simplify_full()
    
    Vo=(I[5][0]*R6+I[4][0]*R5+I[3][0]*R4).simplify_full()
    Vo=Vo.substitute(R1==R,R2==R,R3==R)
    
    eq13=(26/27==Vo.substitute(V1= 1,V2= 1,V3= 1))
    eq12=(24/27==Vo.substitute(V1= 0,V2= 1,V3= 1))
    eq11=(22/27==Vo.substitute(V1=-1,V2= 1,V3= 1))
    eq10=(20/27==Vo.substitute(V1= 1,V2= 0,V3= 1))
    eq09=(18/27==Vo.substitute(V1= 0,V2= 0,V3= 1))
    eq08=(16/27==Vo.substitute(V1=-1,V2= 0,V3= 1))
    eq07=(14/27==Vo.substitute(V1= 1,V2=-1,V3= 1))
    eq06=(12/27==Vo.substitute(V1= 0,V2=-1,V3= 1))
    eq05=(10/27==Vo.substitute(V1=-1,V2=-1,V3= 1))
    eq04=( 8/27==Vo.substitute(V1= 1,V2= 1,V3= 0))
    eq03=( 6/27==Vo.substitute(V1= 0,V2= 1,V3= 0))
    eq02=( 4/27==Vo.substitute(V1=-1,V2= 1,V3= 0))
    eq01=( 2/27==Vo.substitute(V1= 1,V2= 0,V3= 0))
    
    sln=solve([eq01,eq02,eq03,eq04,eq05,eq06,eq07,eq08,eq09,eq10,eq11,eq12,eq13],R4,R5,R6)
    show(sln)

    Turns out that it is not R-2R. It is R-2R-4/3R! Let us plug my 3-trit counter to the resistor ladder:

    The sawtooth wave clocks the counter, and we have a nice staircase output. With few spikes, but those are easy to filter out.

  • I/O board

    Dmitry V. Sokolov12/19/2017 at 11:16 0 comments

    On my photos you will often see the FR-2 brown board, I guess it would be good to show how it works.

    It has 9 lines that can be used both as input and output, here is the schema of one i/o line:

    So the board has 9 single pole triple throw slide switches connected to -5, 0 and 5V. When the switch is in the middle position, the line reads voltage. The common collector amplifier is an overkill here.

    Here is the layout of the board:

    In fact, this is exactly the circuit I have in my program memory, but it can be used for reading signals too.

  • Random access memory

    Dmitry V. Sokolov12/15/2017 at 16:15 0 comments

    To build a single edge triggered flip-flap-flop I need 4 ternary multiplexers.

    It means that I need 2 trimux boards per trit to store. These are two 3-trit memory cells, therefore 12 trimux boards (6 boards per cell).

    TRIADOR will have 13 3-trit memory cells in total, let me show you the RAM board:

  • It is Christmas soon!

    Dmitry V. Sokolov12/15/2017 at 14:08 0 comments

    My Christmas decoration: 

    This how the program memory looks like. Those are single pole triple throw slide switches. For the sake of visibility the position of the switches is highlighted with bi-color LEDs. Red light = -1, no light = 0, green light = 1.

    The opcodes have 5 trits, so I have 27 5-trit instructions per memory segment. One memory segment is composed of 5 copies of this circuit:

    Given a 3-trit address (hi,mi,lo), the 1:27 multiplexor (made with 5 1:3 multiplexers) provides one trit of the corresponding opcode. Thus one memory segment can be seen as a black box that receives a 3-trit address and provides a 5-trit opcode.

    Here I have soldered 2 program memory segments, 54 instructions total. The architecture supports up to 27 memory segments (27*27=729 instructions).  

  • Ternary memory latch

    Dmitry V. Sokolov12/15/2017 at 10:14 0 comments

    WIth two multiplexers (one trimux board) it is possible to build a memory cell:

  • Nixie tubes display for the ternary counter

    Dmitry V. Sokolov12/15/2017 at 10:04 0 comments

  • Program counter

    Dmitry V. Sokolov12/15/2017 at 09:54 0 comments

    Our computer needs a program counter. So we start with a schema:

    Test it on a breadboard:

    And here is the final program counter that will drive the TRIADOR:

  • Building blocks are ready

    Dmitry V. Sokolov12/15/2017 at 09:48 1 comment

    As I said, the only building block allowed is a ternary multiplexer based on DG403 analog switches. With two DG403 it is possible to build a circuit bearing two ternary multiplexers:

    Here is the layout:

    The total budget for this project is set to 300 trimuxes or 600 ternary multiplexers. Here are all the components soldered, cleaned and tested:

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